IP Library › Granted Patent US 8,362,608
Granted Patent B2
US 8,362,608 · App. 12/681,617 · Granted Jan 29, 2013

Ultra wideband hermetically sealed surface mount technology for microwave monolithic integrated circuit package

Inventors: In Kwon Ju (Daejeon, KR); In Bok Yom (Daejeon, KR)
Assignee: Electronics and Telecommunications Research Institute
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Quick Facts
Patent No.
US 8,362,608
App. No.
12/681,617
Granted
Jan 29, 2013
Kind
B2
Abstract

An ultra wideband hermetically sealed surface mount package for a microwave monolithic integrated circuit (MMIC) is provided including: an integrated circuit; a package body being mounted with the integrated circuit and comprising a plurality of first dielectrics formed in a multilayer, a first line unit mounted to a circuit substrate and is electrically connected with an external circuit, a second line unit upwardly extended from the first line unit and is electrically connected with the first line unit, a third line unit extended to the right angle from the second line unit and is electrically connected with the second line unit, and a bonding unit that electrically connects the third line unit and the mounted integrated circuit; and a package cover being formed on the package body to seal the integrated circuit and comprising a plurality of second dielectrics formed in a multilayer.

Claims (15)

1. An ultra wideband hermetically sealed surface mount package for a microwave monolithic integrated circuit (MMIC), the package comprising:

an integrated circuit;

a package body being mounted with the integrated circuit and comprising a plurality of first dielectrics that is formed in a multilayer, a first line unit that is mounted to a circuit substrate and is electrically connected with an external circuit, a second line unit that is upwardly extended from the first line unit and is electrically connected with the first line unit, a third line unit that is extended to the right angle from the second line unit and is electrically connected with the second line unit, and a bonding unit that electrically connects the third line unit and the mounted integrated circuit; and

a package cover being formed on the package body to seal the integrated circuit and comprising a plurality of second dielectrics that is formed in a multilayer.

2. The package of claim 1 , wherein:

the first line unit comprises a shielded multilayer coplanar waveguide (SMCPW) 1 line that is horizontally formed and is electrically connected with the circuit substrate,

the second line unit comprises a trough line that is vertically extended from the SMCPW 1 line and is electrically connected with the SMCPW 1 line, and a slab line that is vertically extended from the trough line and is electrically connected with the trough line, and

the third line unit comprises an SMCPW 2 line that is horizontally extended from the slab line and is electrically connected with the slab line, an SMCPW 3 line that is horizontally extended from the SMCPW 2 line and is electrically connected with the SMCPW 2 , and a grounded coplanar waveguide (GCPW) 1 line that is horizontally extended from the SMCPW 3 line and is electrically connected with the SMCPW 3 .

3. The package of claim 1 , wherein the second line unit comprises a signal via that transfers an electrical signal from the external circuit, a plurality of ground planes, and a plurality of ground vias.

4. The package of claim 1 , wherein the circuit substrate comprises a GCPW 2 line that is electrically connected with the first line unit.

5. The package of claim 1 , wherein an SMCPW 1 line of the first line unit, and an SMCPW 2 line and an SMCPW 3 line of the third line unit are formed in a shielding structure surrounded by a plurality of ground planes and a plurality of ground vias.

6. The package of claim 1 , wherein the package body comprises a thermal via that dissipates heat generated from the integrated circuit.

7. The package of claim 1 , wherein the bonding unit

electrically connects a GCPW 1 line of the third line unit and a radio frequency (RF) pad of the integrated circuit through wire bonding or ribbon bonding, electrically connects a ground plane of the package body and a ground pad of the integrated circuit through wire bonding or ribbon bonding, or

electrically connects an internal direct current (DC) pad of the package body and an internal DC pad of the integrated circuit through wire bonding or ribbon bonding.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 2, 2010
From: JU, IN KWON; YOM, IN BOK
To: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
Reel/Frame 024182/0515 →
Priority Claims (1)
KR 10-2007-0100305 · Oct 5, 2007 · national
Continuity (1)
Related Publication 20100213584A1 · Aug 26, 2010