Transistor and method for manufacturing the transistor
View Patent ↗It is an object to reduce characteristic variation among transistors and reduce contact resistance between an oxide semiconductor layer and a source electrode layer and a drain electrode layer, in a transistor where the oxide semiconductor layer is used as a channel layer. In a transistor where an oxide semiconductor is used as a channel layer, at least an amorphous structure is included in a region of an oxide semiconductor layer between a source electrode layer and a drain electrode layer, where a channel is to be formed, and a crystal structure is included in a region of the oxide semiconductor layer which is electrically connected to an external portion such as the source electrode layer and the drain electrode layer.
1. A method for manufacturing a transistor comprising the steps of:
forming a gate electrode over a substrate;
forming a gate insulating layer over the gate electrode;
forming a source electrode layer and a drain electrode layer over the gate insulating layer;
forming a first metal oxide layer including zinc and a crystal structure over the source electrode layer;
forming a second metal oxide layer including zinc and a crystal structure over the drain electrode layer;
forming an oxide semiconductor layer including zinc and an amorphous structure over the gate electrode and on the first metal oxide layer and the second metal oxide layer; and
performing heat treatment to move zinc from the first metal oxide layer and the second metal oxide layer to the oxide semiconductor layer such that a first region in contact with the first metal oxide layer and a second region in contact with the second metal oxide layer are crystallized in the oxide semiconductor layer.
2. The method for manufacturing the transistor according to claim 1 ,
wherein the oxide semiconductor layer is formed using a composition different from a composition of the first metal oxide layer and the second metal oxide layer.
3. The method for manufacturing the transistor according to claim 1 ,
wherein the first metal oxide layer and the second metal oxide layer are formed using zinc oxide, and
wherein the oxide semiconductor layer is formed using an oxide semiconductor layer including indium, zinc, and gallium.
4. The method for manufacturing the transistor according to claim 1 ,
wherein the oxide semiconductor layer is formed by a sputtering method using a target including indium, gallium, and zinc.
5. The method for manufacturing the transistor according to claim 1 ,
wherein a portion of the oxide semiconductor layer located between the source electrode layer and the drain electrode layer is kept amorphous in the performing heat treatment step.
6. The method for manufacturing the transistor according to claim 1 ,
wherein a portion of the oxide semiconductor layer located to overlap with the gate electrode is kept amorphous in the performing heat treatment step.
7. A method for manufacturing a transistor comprising the steps of:
forming a gate electrode over a substrate;
forming a gate insulating layer over the gate electrode;
forming an oxide semiconductor layer including zinc and an amorphous structure over the gate insulating layer;
forming a first metal oxide layer and a second metal oxide layer each including zinc and a crystal structure over the oxide semiconductor layer;
forming a source electrode layer over the first metal oxide layer;
forming a drain electrode layer over the second metal oxide layer; and
performing heat treatment to move zinc from the first metal oxide layer and the second metal oxide layer to the oxide semiconductor layer such that a first region in contact with the first metal oxide layer and a second region in contact with the second metal oxide layer are crystallized in the oxide semiconductor layer.
8. The method for manufacturing the transistor according to claim 7 ,
wherein the oxide semiconductor layer is formed using a composition different from a composition of the first metal oxide layer and the second metal oxide layer.
9. The method for manufacturing the transistor according to claim 7 ,
wherein the first metal oxide layer and the second metal oxide layer are formed using zinc oxide, and
wherein the oxide semiconductor layer is formed using an oxide semiconductor layer including indium, zinc, and gallium.
10. The method for manufacturing the transistor according to claim 7 ,
wherein the oxide semiconductor layer is formed by a sputtering method using a target including indium, gallium, and zinc.
11. The method for manufacturing the transistor according to claim 7 ,
wherein a portion of the oxide semiconductor layer located between the source electrode layer and the drain electrode layer is kept amorphous in the performing heat treatment step.
12. The method for manufacturing the transistor according to claim 7 ,
wherein a portion of the oxide semiconductor layer located to overlap with the gate electrode is kept amorphous in the performing heat treatment step.
13. A method for manufacturing a transistor comprising the steps of:
forming a source electrode layer and a drain electrode layer over a substrate;
forming a first metal oxide layer including zinc and a crystal structure over the source electrode layer;
forming a second metal oxide layer including zinc and a crystal structure over the drain electrode layer;
forming an oxide semiconductor layer including zinc and an amorphous structure on the first metal oxide layer and the second metal oxide layer;
performing heat treatment to move zinc from the first metal oxide layer and the second metal oxide layer to the oxide semiconductor layer such that a first region in contact with the first metal oxide layer and a second region in contact with the second metal oxide layer are crystallized in the oxide semiconductor layer;
forming a gate insulating layer over the oxide semiconductor layer; and
forming a gate electrode over the gate insulating layer overlapping the oxide semiconductor layer.
14. The method for manufacturing the transistor according to claim 13 ,
wherein the oxide semiconductor layer is formed using a composition different from a composition of the first metal oxide layer and the second metal oxide layer.
15. The method for manufacturing the transistor according to claim 13 ,
wherein the first metal oxide layer and the second metal oxide layer are formed using zinc oxide, and
wherein the oxide semiconductor layer is formed using an oxide semiconductor layer including indium, zinc, and gallium.
16. The method for manufacturing the transistor according to claim 13 ,
wherein the oxide semiconductor layer is formed by a sputtering method using a target including indium, gallium, and zinc.
17. The method for manufacturing the transistor according to claim 13 ,
wherein a portion of the oxide semiconductor layer located between the source electrode layer and the drain electrode layer is kept amorphous in the performing heat treatment step.
18. The method for manufacturing the transistor according to claim 13 ,
wherein a portion of the oxide semiconductor layer located to overlap with the gate electrode is kept amorphous in the performing heat treatment step.