Encryption apparatus having common key encryption function and embedded apparatus

1. A common key block encryption apparatus for computing 8-bit output data U −1 ∘f r from 8-bit input data U∘g r , where U is arbitrary 8-bit data, in a composite field GF(( . . . (2 β1 ) . . . ) βγ ) that satisfies βγ=2 by using 4-bit c r , 8-bit g r , 4-bit d r and 8-bit f r as fixed mask values selected with a random number r, and by using 8-bit R and R′ as random mask values, comprising:

a masked U 16 ⊚U calculation circuit configured to calculate a 4-bit value U 17 ∘c r from the input data U∘g r with a U 16 ⊚U calculation for XORing with a random mask value, and to calculate 8-bit U 16 ∘R′ and R′;

a 4-bit-to-4-bit transformation table circuit that is selected with a random number r, and configured to calculate 4-bit U −17 ∘d r from the U 17 ∘c r output from the masked U 16 ⊚U calculation circuit; and

a masked U −17 ⊚U 16 calculation circuit, to which U −17 ∘d r output from the 4-bit-to-4-bit transformation table circuit, U 16 ∘R′output from the masked U 16 ⊚U calculation circuit, and R′ are input, and which is configured to calculate the output data U −1 ∘f r .

2. The encryption apparatus according to claim 1 , wherein:

the masked U 16 ⊚U calculation circuit comprises

a computing circuit group, to which the fixed mask value g r , the input data U∘g r , and the random mask value R are input, and which is configured to calculate three pieces of data such as U∘R=(U∘g r )∘R∘g r , U 16 ∘R 16 =(U∘R) 16 , and R 16 , and

a computing circuit group configured to perform a computation

J 1=( U∘R )⊚( U 16 ∘R 16 )

J 2= R 16 ⊚( U∘R )

J 3= R ⊚( U 16 ∘R 16 )

J 4 =R⊚R 16

J 0 =J 1 ∘J 2 ∘J 3 ∘J 4 ∘c r or,

a computing circuit group configured to perform a computation equivalent to this computation; and

the J0 is input as the U 17 ∘c r to the 4-bit-to-4-bit transformation table circuit, and the U 16 ∘R 16 and the R 16 are input as the U 16 ∘R′ and the R′ to the masked U −17 ⊚U 16 caulcation circuit.

3. The encryption apparatus according to claim 1 , wherein:

the masked U 16 ⊚U calculation circuit comprises

a computing circuit group, to which the fixed mask value g r , the input data U∘g r , and the random mask value R are input, and which is configured to calculate two pieces of data such as U∘R=(U∘g r )∘R∘g r and 16 ∘R (U∘R) 16 ∘R∘R 16 , and

a computing circuit group configured to perform a computation

J 1=( U∘R )⊚( U 16 ∘R )

J 2= R ⊚(( U∘R )∘( U 16 ∘R )∘ R )

J 0 =J 1 ∘J 2 ∘c r

or, a computing circuit group configured to perform a computation equivalent to this computation; and

the J0 is input as the U 17 ∘c r to the 4-bit-to-4-bit transformation table circuit, and the U 16 ∘R and the R are input as the U 16 ∘R′ and the R′ to the masked U −17 ⊚U 16 calculation circuit.

4. The encryption apparatus according to claim 1 , wherein:

the masked U −17 ⊚U 16 calculation circuit comprises

a computing circuit group, to which U −17 ⊚d r output from the 4-bit-to-4-bit transformation table circuit, the fixed mask values d r and f r , U 16 ∘R′output from the masked U 16 ⊚U calculation circuit, R′, and a random number S generated within the circuit are input, and which is configured to calculate two pieces of data such as U −17 ⊚S⊚d r (U −17 ∘d r )∘S and S⊚d r , and

a computing circuit group configured to perform a computation

J 1=( U −17 ∘S∘d r )⊚( U 16 ∘R ′)

J 2= R ′⊚( U −17 ∘S∘d r )

J 3=( S∘d r )⊚( U 16 ∘R ′)

J 4=( S∘d r )⊚ R′

J 0 =J 1 ∘J 2 ∘J 3 ∘J 4 ∘f r

or, a computing circuit group configured to perform a computation equivalent to this computation; and

the J0 is output as the U −1 ∘f r .

5. The encryption apparatus according to claim 1 , wherein:

the masked U −17 ⊚U 16 calculation circuit comprises

a computing circuit group, to which U −17 ⊚d r is output from the 4-bit-to-4-bit transformation table circuit, the fixed mask values d r and f r , U 16 ∘R′ is output from the masked U 16 ⊚U calculation circuit, R′, and higher-order 4 bits R′ H and lower-order 4 bits R′ L of R′ are input, and which is configured to calculate five pieces of data such as U 16 ∘(d r ∥d r )∘R′,U −17 ∘d r ∘R′ L , d r ∘R′, U −17 ∘d r ∘R′ H and d r ∘R′ H , and

a computing circuit group configured to perform a computation

J 1=( U 16 ∘( d r ∥d r )∘ R ′)⊚( U −17 ∘d r ∘R′ H )

J 2=( U −17 ∘d r ∘R′ H )⊚( d r ∘R′ H )∘( d r ∘R′ H ) 2

J 3=(( U 16 ∘( d r ∥d r )∘ R ′)∘( U −17 ∘d r ∘R′ L )∘( d r ∘R′ L ))⊚( d r ∘R′ L )

J 0= J 1∘( J 2∥(0000) 2 )∘ J 3∘ f r

or, a computing circuit group configured to perform a computation equivalent to this computation; and

the J0 is output as the U −1 ∘f r .

6. The encryption apparatus according to claim 1 , wherein:

the masked U −17 ⊚U 16 calculation circuit comprises

a computing circuit group, to which U −17 ∘d r output from the 4-bit-to-4-bit transformation table circuit, the fixed mask values d r and f r , U 16 ∘R′ output from the masked U 16 ⊚U calculation circuit, R′, and higher-order 4 bits R′ H and lower-order 4-bits R′ L of R′ are input, and which is configured to calculate three pieces of data such as U 16 H ∘R′ L =(higher-order 4 bits of U 16 ∘R′)∘R′ L ∘R′ H , U −17 ∘R′ L =(U −17 ∘d r )∘R′ L ∘d r , U 16 L ∘R′ L =(lower-order 4 bits of U 16 ⊚R′) by using U 16 H and U 16 L respectively as higher-order 4 bits and lower-order 4 bits of an 8-bit value U 16 , and

a computing circuit group configured to perform a computation

J 1=( U 16 H ∘R′ L )⊚( U −17 ∘R′ L )

J 2=(( U 16 H ∘R′ L )∘( U −17 ∘R′ L )∘ R′ L )⊚ R′ L

J 3=( U 16 L ∘R′ L )⊚( U −17 ∘R′

J 4=(( U 16 L ∘R′ L )∘( U −17 ∘R′ L )∘ R′ L )⊚ R′ L

J 0=(( J 1∘ J 2)∥( J 3∘ J 4))∘ f r

or, a computing circuit group configured to perform a computation equivalent to this computation; and

the J0 is input as the U −1 ∘f r .

7. The encryption apparatus according to claim 1 , wherein U is a linear transformation δ of 8-bit input data.

8. The encryption apparatus according to claim 7 , wherein linear transformation δ is a matrix operation performing an isomorphism function.