IP Library Granted Patent US 8,373,832
Granted Patent B2
US 8,373,832 · App. 13/503,699 · Granted Feb 12, 2013

Wiring layer, semiconductor device, and liquid crystal display device using semiconductor device

Inventors: Satoru Takasawa (Sammu, JP); Masanori Shirai (Sammu, JP); Satoru Ishibashi (Sammu, JP)
Assignee: Ulvac, Inc.
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Quick Facts
Patent No.
US 8,373,832
App. No.
13/503,699
Granted
Feb 12, 2013
Kind
B2
Abstract

An electrode film, which is not peeled off from an oxide thin film and in which a copper atom does not diffuse into the oxide thin film, is provided. A wiring layer is composed of a high-adhesion barrier film 37 , which is a thin film of Cu—Mg—Al and a copper thin film 38 ; and the high-adhesion barrier film 37 is brought into contact with the oxide thin film. When a total number of atoms of copper, magnesium, and aluminum is set to 100 at %, if the high-adhesion barrier film 37 contains magnesium in a range of between 0.5 at % and 5 at and aluminum in a range of between 5 at % and 15 at %, then wiring layers 50 a, 50 b , can be obtained, whereby the adhesion and the barrier property are compatible with each other, adherence is strong, and a copper atom does not diffuse.

Claims (30)

1. A wiring layer arranged and patterned on an oxide thin film, the wiring layer comprising:

a high-adhesion barrier film in contact with the oxide thin film; and

a copper thin film arranged on the high-adhesion barrier film,

wherein the high-adhesion barrier film contains copper, magnesium, and aluminum, and the high-adhesion barrier film contains magnesium at a content rate in a range of 0.5 at % to 5 at % and aluminum at a content rate in a range of 5 at % to 15 at % when a total number of atoms of copper, magnesium, and aluminum is set to 100 at %.

2. A semiconductor device comprising:

a wiring layer according to claim 1 ;

a semiconductor layer;

a gate insulating film formed on the semiconductor layer; and

a gate electrode film facing the semiconductor layer with the gate insulating film interposed therebetween,

wherein, in the semiconductor layer, a channel region is provided in a portion facing the gate electrode film, a source region and a drain region are provided on both sides of the channel region, the gate insulating film is made of the oxide thin film, and the wiring layer is arranged with the high-adhesion barrier film being in contact with the gate insulating film.

3. A semiconductor device comprising:

a source electrode layer and a drain electrode layer each made of a wiring layer according to claim 1 ;

a semiconductor layer;

a gate insulating film formed on the semiconductor layer; and

a gate electrode film facing the semiconductor layer with the gate insulating film interposed therebetween,

wherein, in the semiconductor layer, a channel region is provided in a portion facing the gate electrode film, a source region and a drain region are provided on both sides of the channel region, the source electrode layer and the drain electrode layer are in contact with the source region and the drain region, respectively, the oxide thin film is arranged under the source electrode layer and the drain electrode layer, and the wiring layer is arranged with the high adhesion barrier film being in contact with the oxide thin film.

4. A liquid crystal display device comprising:

a semiconductor device according to claim 2 ;

a glass substrate;

a pixel electrode layer formed over the glass substrate;

a liquid crystal positioned over the pixel electrode layer; and

an upper electrode layer positioned over the liquid crystal,

wherein either source electrode layer or a drain electrode layer is connected to the pixel electrode layer by the wiring layer, a voltage applied between the pixel electrode layer and the upper electrode layer is switched by the semiconductor device, and the liquid crystal is included between the pixel electrode layer and the upper electrode layer.

5. A liquid crystal display device comprising:

a semiconductor device according to claim 3 ;

a glass substrate;

a pixel electrode layer formed over the glass substrate;

a liquid crystal positioned over the pixel electrode layer; and

an upper electrode layer positioned over the liquid crystal,

wherein either source electrode layer or a drain electrode layer is connected to the pixel electrode layer by the wiring layer, a voltage applied between the pixel electrode layer and the upper electrode layer is switched by the semiconductor device, and the liquid crystal is included between the pixel electrode layer and the upper electrode layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2012
From: TAKASAWA, SATORU; SHIRAI, MASANORI; ISHIBASHI, SATORU
To: ULVAC, INC.
Reel/Frame 028555/0243 →
Priority Claims (1)
JP 2009-246939 · Oct 27, 2009 · national
Continuity (1)
Related Publication 20120262659A1 · Oct 18, 2012