IP Library Granted Patent US 8,375,262
Granted Patent B2
US 8,375,262 · App. 12/690,590 · Granted Feb 12, 2013

Field programmable redundant memory for electronic devices

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Quick Facts
Patent No.
US 8,375,262
App. No.
12/690,590
Granted
Feb 12, 2013
Kind
B2
Abstract

An electronic device is provided including an input/output (I/O) interface, a plurality of memory elements, a controller coupled to the I/O interface and the plurality of memory elements. In the device, the controller configured for operating the plurality of memory elements during a normal operating mode of the electronic device, where responsive to receiving a command for replacing a selected memory sector in the electronic device during the normal operating mode, the controller is configured for identifying one or more available spare memory sectors in the electronic device and modifying at least one memory map in the electronic device to replace the selected memory sector with the one of the available spare memory sectors.

Claims (51)

1. A method for operating an electronic device, comprising:

enabling a normal operating mode of said electronic device;

evaluating at least, one parameter value associated with a memory sector and comparing said parameter value to at least one parameter threshold value, wherein the parameter value is at least one of leakage current, data retention time, endurance, or program time;

upon the parameter value reaching the parameter threshold value, generating a command for replacing the memory sector;

receiving the command for replacing the memory sector in said electronic device during said normal operating mode;

identifying one or more available spare memory sectors in said electronic device; and

modifying at least one memory map in said electronic device to replace said memory sector with said one of said available spare memory sectors.

2. The method of claim 1 , further comprising:

if said spare memory sectors are unavailable, generating at least one error signal.

3. The method of claim 1 , wherein said modifying further comprises:

altering said memory map in a non-volatile memory portion of said electronic device.

4. The method of claim 1 , wherein said modifying further comprises:

altering said memory map in a volatile memory portion of said electronic device.

5. The method of claim 1 , wherein said modifying further comprises:

altering said memory map in a volatile memory portion of said electronic device;

changing said memory map in a non-volatile memory portion of said electronic device based on said memory map in said volatile memory portion; and

generating an error message if an error is detected during at least one of said altering and said changing.

6. The method of claim 1 , wherein said modifying further comprises:

confirming that said command includes a valid bypass code prior to said modifying of said memory map.

7. All electronic device, comprising:

an input/output (I/O) interface;

a plurality of memory elements;

a controller coupled to said I/O interface and said plurality of memory elements, said controller configured for operating said plurality of memory elements during a normal operating mode of said electronic device,

wherein the controller is configured to evaluate at least one parameter value associated with a memory sector and compare said parameter value to at least one parameter threshold value, wherein the parameter value is at least one of leakage current, data retention time, endurance, or program time, and upon the parameter value reaching the parameter threshold value, generating a command for replacing the memory sector;

wherein responsive to receiving the command for replacing the memory sector in said electronic device during said normal operating mode, said controller is further configured for identifying one or more available spare memory sectors in said electronic device and modifying at least one memory map in said electronic device to replace said memory sector with said one of said available spare memory sectors.

8. The device of claim 7 , wherein said controller is configured for generating at least one error signal if said spare memory sectors are unavailable.

9. The device of claim 7 , wherein said controller is further configured during said modifying for altering said memory map in a non-volatile memory portion of said electronic device.

10. The device of claim 7 , wherein said controller is further configured during said modifying for:

altering said memory map in a volatile memory portion of said electronic device;

changing said memory map in a non-volatile memory portion of said electronic device based on said memory map in said volatile memory portion; and

generating an error message if an error is detected during at least one of said altering and said changing.

11. A computing system, comprising;

at least one device interface;

at least one processing element coupled to said device interface, said processing element configured for reading and writing data to said device interface, and further configured to enable evaluation at least one parameter value associated with a memory sector and comparing said parameter value to at least one parameter threshold value, wherein the parameter value is at least one of leakage current, data retention time, endurance, or program time, and upon the parameter value reaching the parameter threshold value, to enable generation a command for replacing the memory sector; and

at least one electronic device coupled to said device interface, said electronic device configured for receiving the command for replacing the memory sector in said electronic device during a normal operating mode,

wherein said electronic device is configured for identifying one or more available spare memory sectors in said electronic device and modifying at least one memory map in said electronic device to replace said memory sector with said one of said available spare memory sectors.

12. The system of claim 11 , wherein said electronic device is further configured during said modifying for altering said memory map in a non-volatile memory portion of said electronic device.

13. The system of claim 11 , wherein said electronic device is further configured during said modifying for:

altering said memory map in a volatile memory portion of said electronic device;

changing said memory map in a non-volatile memory portion of said electronic device based on said memory map in said volatile memory portion; and

generating an error message if an error is detected during at least one of said altering and said changing.

14. The system of claim 11 , wherein said electronic device is further configured for determining if said command includes a valid bypass code prior to said determining.

15. The system of claim 11 , wherein said processing element further comprises a software moans for writing said command to said memory interface.

16. A method, comprising:

enabling a normal operating mode of an electronic device that includes a NAND flash memory device, wherein the NAND flash memory device includes a plurality of memory sectors and a plurality of spare memory sectors;

for each memory sector of the plurality of memory sectors, evaluating at least one parameter value associated with the memory sector and comparing the parameter value to at least one parameter threshold value, wherein the parameter value is at least one of leakage current, data retention time, endurance, or program time;

for each memory sector of the plurality of memory sectors, upon the parameter value reaching the parameter threshold value:

generating a command for replacing the memory sector for which the parameter value reached the parameter threshold value;

receiving the command for replacing the memory sector during said normal operating mode;

identifying one or more available spare memory sectors of the plurality of spare memory sectors; and

modifying at least one memory map in the electronic device to repine the memory sector with said one of said available spare memory sectors, wherein the modification of the memory map is performed such that the quantity of available user memory space is maintained in spite of the memory sector replacement, and such that the modification is performed during the normal operating mode of the electronic device.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 15, 2022
From: CYPRESS SEMICONDUCTOR CORPORATION
To: INFINEON TECHNOLOGIES LLC
Reel/Frame 059721/0467 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036051/0786 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
SECURITY AGREEMENT Recorded Aug 23, 2012
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 028837/0076 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2011
From: OLIVER, ARTHUR BENJAMIN
To: SPANSION LLC
Reel/Frame 025678/0443 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 27, 2010
From: PARKER, ALLAN; YANCEY, GREGORY CHARLES; SUNDAHL, BRADLEY E.; O'MULLAN, SEAN MICHAEL; DARILEK, JOHN ANTHONY
To: SPANSION LLC
Reel/Frame 023852/0511 →