IP Library › Granted Patent US 8,377,550
Granted Patent B2
US 8,377,550 · App. 12/655,366 · Granted Feb 19, 2013

Flip chip package containing novel underfill materials

Inventors: Rajasekaran Swaminathan (Chandler, AZ); Hong Dong (Chandler, AZ); Sandeep Razdan (Chandler, AZ); Nisha Ananthakrisnan (Chandler, AZ); Rahul Manepalli (Chandler, AZ)
Assignee: Intel Corporation
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Quick Facts
Patent No.
US 8,377,550
App. No.
12/655,366
Granted
Feb 19, 2013
Kind
B2
Abstract

Methods and associated structures of forming underfill material are described. Those methods may include applying an underfill to an interconnect structure comprising residue from a no clean flux, wherein the underfill comprises at least one of a functionalized nanofiller and a micron-sized filler.

Claims (27)

1. A method comprising:

applying an underfill to an interconnect structure comprising residue from a no clean flux, wherein the underfill comprises a functionalized nano filler and a micro filler, and wherein the functionalized nano filler comprises a surface functionalized silica nanoparticle with an attached functional group of at least one of a biotin, a 8-oxoguanosine, a 8-oxoadenosine and a ureido functional group.

2. The method of claim 1 further comprising wherein the nano filler comprises a size below about 50 nm.

3. The method of claim 1 further comprising wherein a NH portion of the functional group chemically bonds with an acidic portion of the no clean flux residue.

4. The method of claim 1 wherein an interaction between an acid from the no clean flux residue and an ureido functional group coated on the surface functionalized nanofiller reduces an acid catalytic effect on underfill gelling and curing.

5. The method of claim 4 wherein the interaction decreases residue voids.

6. The method of claim 1 wherein the functional group of the surface functionalized nano-filler is tuned to chemically attach to the flux residue components by forming a residue underfill complex that becomes part of the underfill.

7. The method of claim 1 further comprising wherein the underfill comprises less than about 70 percent of microfillers and funtionalized nanofillers.

8. The method of claim 1 further comprising wherein the underfill comprises less than about 20 percent nanofillers.

9. A structure comprising:

an interconnect structure comprising a no clean flux residue; and

an underfill comprising a surface functionalized nanofiller and a micro filler, wherein the no clean flux residue comprises at least one of a chemical bond and a physical compatibility to a functional group of the surface functionalized nanofiller and wherein functional group comprises at least one of biotin, 8-oxoguanosine, 8-oxoadenosine and ureido.

10. The structure of claim 9 wherein the underfill material comprises an epoxy underfill and wherein the functionalized nanoparticles are coupled with the no clean flux residue.

11. The structure of claim 9 wherein the no clean flux residue comprises an acid residue.

12. The structure of claim 9 wherein the microfiller is surface functionalized and comprises a complex with the no clean flux reside.

13. The structure of claim 9 wherein the surface functionalized nanofiller comprises a size of less than about 50 nm, and comprises a percentage of less than about 20 percent of the underfill.

14. A structure comprising:

an interconnect structure comprising a portion of a microelectronic package;

an underfill around the interconnect structure, wherein the underfill comprises a functionalized nanofiller and a micro filler, wherein the functionalized nano filler comprises a functional group comprising at least one of a biotin, a 8-oxoguanosine, a 8-oxoadenosine and a ureido functional group.

15. The structure of claim 14 wherein the functionalized nanofiller comprises a surface functional group coupled with a no clean flux residue.

16. The structure of claim 15 wherein the functionalized nanofiller comprises an amine group of a functional group of the nano filler coupled with a hydroxyl group of the no clean flux residue.

17. The structure of claim 14 wherein the interconnect structure comprises a first level interconnect of the microelectronic package structure.

18. The structure of claim 14 wherein the microfiller comprises a surface functional group in complex with a no clean flux reside.

19. The structure of claim 14 further comprising a system comprising:

a bus communicatively coupled to the structure; and

a DRAM communicatively coupled to the bus.

20. The structure of claim 14 wherein the nanofiller and microfiller are dispersed uniformly in the underfill.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 21, 2011
From: SWAMINATHAN, RAJASEKARAN; DONG, HONG; RAZDAN, SANDEEP; ANANTHAKRISHNAN, NISHA; MANEPALLI, RAHUL N.
To: INTEL CORPORATION
Reel/Frame 026626/0891 →
Continuity (1)
Related Publication 20110159228A1 · Jun 30, 2011