IP Library › Granted Patent US 8,389,313
Granted Patent B2
US 8,389,313 · App. 12/299,082 · Granted Mar 5, 2013

Deposition method of III group nitride compound semiconductor laminated structure

Inventors: Hisayuki Miki (Ichihara, JP); Kenzo Hanawa (Ichihara, JP); Yasumasa Sasaki (Ichihara, JP)
Assignee: Toyoda Gosei Co., Ltd.
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Quick Facts
Patent No.
US 8,389,313
App. No.
12/299,082
Granted
Mar 5, 2013
Kind
B2
Abstract

The present invention provides a deposition method of a multilayered structure composed of a III group nitride compound semiconductor having good crystallinity on a substrate. The multilayered structure comprises at least a buffer layer and an underlying layer from the substrate side, and the buffer layer and the underlying layer are formed by a sputtering method. A deposition temperature of the buffer layer is adjusted to a temperature lower than a deposition temperature of the underlying layer, or the thickness of the buffer layer is adjusted to 5 nm to 500 nm. Furthermore, the multilayered structure comprises at least an underlying layer and a light-emissive layer from the substrate side and the underlying layer is formed by a sputtering method, and the method comprises the step of forming the light-emissive layer by a metal-organic chemical vapor deposition (MOCVD method).

Claims (16)

1. A deposition method of a multilayered structure composed of a III group nitride compound semiconductor on a substrate, characterized in that:

the multilayered structure comprises at least a buffer layer formed on a surface of the substrate, and an underlying layer formed on a surface of the buffer layer,

the buffer layer and the underlying layer are laminated by a sputtering method, and

a deposition temperature of the buffer layer is adjusted to a temperature lower than a deposition temperature of the underlying layer

wherein a ratio of a nitrogen flow rate to a flow rate of nitrogen and argon is from 75% to 100% during deposition of the underlying layer.

2. The deposition method of a III group nitride compound semiconductor laminated structure according to claim 1 , wherein the buffer layer contains Al.

3. The deposition method of a III group nitride compound semiconductor laminated structure according to claim 2 , wherein the buffer layer is formed of AlN.

4. The deposition method of a III group nitride compound semiconductor laminated structure according to claim 2 , wherein the buffer layer is formed of an aggregate of a columnar crystal.

5. The deposition method of a III group nitride compound semiconductor laminated structure according to claim 2 , wherein at least 60% of the substrate is coated with the buffer layer.

6. The deposition method of a III group nitride compound semiconductor laminated structure according to claim 2 , wherein the buffer layer has a thickness of 20 to 100 nm.

7. The deposition method of a III group nitride compound semiconductor laminated structure according to claim 1 , wherein the underlying layer contains Ga.

8. The deposition method of a III group nitride compound semiconductor laminated structure according to claim 7 , wherein the underlying layer is formed of GaN.

9. The deposition method of a III group nitride compound semiconductor laminated structure according to claim 1 , wherein the buffer layer is formed of AlN and the underlying layer is formed of GaN.

10. The deposition method of a III group nitride compound semiconductor laminated structure according to claim 1 , wherein the buffer layer has a deposition temperature of room temperature to 800° C.

11. The deposition method of a III group nitride compound semiconductor laminated structure according to claim 1 , wherein the underlying layer has a deposition temperature of 300 to 1,500° C.

12. The deposition method of a III group nitride compound semiconductor laminated structure according to claim 1 , wherein a difference in the deposition temperature between the buffer layer and the underlying layer is 100° C. or higher.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2013
From: SHOWA DENKO K.K.
To: TOYODA GOSEI CO., LTD.
Reel/Frame 029747/0464 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2008
From: MIKI, HISAYUKI; HANAWA, KENZO; SASAKI, YASUMASA
To: SHOWA DENKO K.K.
Reel/Frame 021765/0503 →
Priority Claims (3)
JP 2006-268438 · Sep 29, 2006 · national
JP 2006-274896 · Oct 6, 2006 · national
JP 2006-275485 · Oct 6, 2006 · national
Continuity (1)
Related Publication 20090087936A1 · Apr 2, 2009