IP Library › Granted Patent US 8,389,993
Granted Patent B2
US 8,389,993 · App. 13/361,998 · Granted Mar 5, 2013

Display device having a buffer layer formed over a channel protective layer

Inventors: Satoshi Kobayashi (Kanagawa, JP); Ikuko Kawamata (Kanagawa, JP); Koji Dairiki (Kanagawa, JP); Shigeki Komori (Kanagawa, JP); Toshiyuki Isa (Kanagawa, JP); Shunpei Yamazaki (Tokyo, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 8,389,993
App. No.
13/361,998
Granted
Mar 5, 2013
Kind
B2
Abstract

A display device including a thin film transistor with high electric characteristics and high reliability, and a method for manufacturing the display device with high mass-productivity. In a display device including an inverted-staggered channel-stop-type thin film transistor, the inverted-staggered channel-stop-type thin film transistor includes a microcrystalline semiconductor film including a channel formation region, and an impurity region containing an impurity element of one conductivity type is selectively provided in a region which is not overlapped with source and drain electrodes, in the channel formation region of the microcrystalline semiconductor film.

Claims (27)

1. A manufacturing method of a display device, comprising the steps of:

forming a gate electrode over a substrate;

forming a gate insulating film over the gate electrode;

forming a microcrystalline semiconductor film over the gate insulating film, the microcrystalline semiconductor film including a channel formation region;

forming a channel protective layer over the channel formation region;

forming a buffer layer over the channel protective layer;

forming a source and drain regions over the buffer layer;

forming a source and drain electrodes over the source and drain regions; and

forming an impurity region by adding an impurity element which imparts one conductivity type selectively in the channel formation region of the microcrystalline semiconductor film, through the channel protective layer with a use of the source and drain electrodes as masks.

2. The manufacturing method of a display device according to claim 1 , after forming the impurity region, further comprising a step of irradiating the impurity region with a laser light through the channel protective layer.

3. The manufacturing method of a display device according to claim 1 , wherein the buffer layer is formed of an amorphous semiconductor film.

4. The manufacturing method of a display device according to claim 1 , wherein the impurity region is formed in the channel formation region of the microcrystalline semiconductor film between the source and drain electrodes.

5. The manufacturing method of a display device according to claim 1 , wherein the impurity element which imparts one conductivity type is an impurity element which imparts p-type conductivity.

6. A manufacturing method of a display device, comprising the steps of:

forming a gate electrode over a substrate;

forming a gate insulating film over the gate electrode;

forming a microcrystalline semiconductor film over the gate insulating film, the microcrystalline semiconductor film including a channel formation region;

forming a channel protective layer over the channel formation region;

forming a buffer layer over the channel protective layer;

forming a source and drain regions over the buffer layer;

forming a source and drain electrodes over the source and drain regions;

forming an impurity region by adding an impurity element which imparts one conductivity type selectively in the channel formation region of the microcrystalline semiconductor film, through the channel protective layer with a use of the source and drain electrodes as masks; and

forming a pixel electrode which is electrically connected to one of the source and drain electrodes.

7. The manufacturing method of a display device according to claim 6 , after forming the impurity region, further comprising a step of irradiating the impurity region with a laser light through the channel protective layer.

8. The manufacturing method of a display device according to claim 6 , wherein the buffer layer is formed of an amorphous semiconductor film.

9. The manufacturing method of a display device according to claim 6 , wherein the impurity region is formed in the channel formation region of the microcrystalline semiconductor film between the source and drain electrodes.

10. The manufacturing method of a display device according to claim 6 , wherein the impurity element which imparts one conductivity type is an impurity element which imparts p-type conductivity.

Priority Claims (1)
JP 2007-227073 · Aug 31, 2007 · national
Continuity (3)
Division 12838115 · Jul 16, 2010
Division 12196798 · Aug 22, 2008
Related Publication 20120129288A1 · May 24, 2012