Method and apparatus for high speed structured multi rate low density parity check codes

1. A method for wireless communications, comprising:

obtaining one or more low-density parity-check (LDPC) matrices having square sub-matrices, wherein at least one of the square sub-matrices comprises rows and columns of blocks, and wherein the at least one of the square sub-matrices comprises only one non-zero block per row and only one non-zero block per column;

encoding data at one or more rates using the one or more LDPC matrices to generate a packet of encoded data; and

transmitting the packet.

2. The method of claim 1 , wherein the LDPC matrices are rate half.

3. The method of claim 1 , wherein:

the LDPC matrices are of a first rate of the one or more rates; and

at least two rows of blocks of one or more of the LDPC matrices are combined to generate one or more other LDPC matrices of a second rate of the one or more rates, the second rate being different from the first rate.

4. The method of claim 3 , wherein the second rate is A/B, A and B are positive integers and A is less than B.

5. The method of claim 1 , wherein each block comprises a zero square matrix or a cyclic shift of an identity matrix.

6. The method of claim 1 , wherein each square sub-matrix has a dimension of one of 3×3 blocks, 4×4 blocks and 5×5 blocks.

7. The method of claim 1 , wherein some of the square sub-matrices comprise all zero blocks.

8. The method of claim 1 , wherein:

at least one of the LDPC matrices of size R×C blocks comprises a first portion of size R×C 1 blocks and a second portion of size R×C 2 blocks;

C 1 +C 2 =C ; and

the first portion comprises only one non-zero block per column of blocks.

9. The method of claim 1 , further comprising:

generating the one or more LDPC matrices from another LDPC matrix of size K base ×N base square sub-matrices, and

wherein each of the K base ×N base square sub-matrices comprises rows and columns of blocks, and further wherein each of the K base ×N base square sub-matrices comprises only one non-zero block per row and only one non-zero block per column.

10. The method of claim 9 , wherein the generation comprises:

replacing at least some of the non-zero blocks with zero blocks of the same size.

11. The method of claim 9 , wherein the generation comprises:

combining at least two rows of blocks of the another LDPC matrix to obtain a second LDPC matrix of a rate that is higher than a rate of the another LDPC matrix; and

replacing at least some of the non-zero blocks of the second LDPC matrix of the higher rate with zero blocks of the same size.

12. An apparatus for wireless communications, comprising:

a circuit configured to obtain one or more low-density parity-check (LDPC) matrices having square sub-matrices, wherein at least one of the square sub-matrices comprises rows and columns of blocks, and wherein the at least one of the square sub-matrices comprises only one non-zero block per row and only one non-zero block per column;

an encoder configured to encode data at one or more rates using the one or more LDPC matrices to generate a packet of encoded data; and

a transmitter configured to transmit the packet.

13. The apparatus of claim 12 , wherein the LDPC matrices are rate half.

14. The apparatus of claim 12 , wherein:

the LDPC matrices are of a first rate of the one or more rates; and

at least two rows of blocks of one or more of the LDPC matrices are combined to generate one or more other LDPC matrices of a second rate of the one or more rates, the second rate being different from the first rate.

15. The apparatus of claim 14 , wherein the second rate is A/B, A and B are positive integers and A is less than B.

16. The apparatus of claim 12 , wherein each block comprises a zero square matrix or a cyclic shift of an identity matrix.

17. The apparatus of claim 12 , wherein each square sub-matrix has a dimension of one of 3×3 blocks, 4×4 blocks and 5×5 blocks.

18. The apparatus of claim 12 , wherein some of the square sub-matrices comprise all zero blocks.

19. The apparatus of claim 12 , wherein:

at least one of the LDPC matrices of size R×C blocks comprises a first portion of size R×C 1 blocks and a second portion of size R×C 2 blocks;

C 1 +C 2 =C ; and

the first portion comprises only one non-zero block per column of blocks.

20. The apparatus of claim 12 , further comprising:

a generator configured to generate the one or more LDPC matrices from another LDPC matrix of size K base ×N base square sub-matrices, and wherein each of the K base ×N base square sub-matrices comprises rows and columns of blocks, and further wherein each of the K base ×N base square sub-matrices comprises only one non-zero block per row and only one non-zero block per column.

21. The apparatus of claim 20 , wherein the generator comprises:

a replacing circuit configured to replace at least some of the non-zero blocks with zero blocks of the same size.

22. The apparatus of claim 20 , wherein the generator comprises:

a combiner configured to combine at least two rows of blocks of the another LDPC matrix to obtain a second LDPC matrix of a rate that is higher than a rate of the another LDPC matrix; and

a replacing circuit configured to replace at least some of the non-zero blocks of the second LDPC matrix of the higher rate with zero blocks of the same size.

23. An apparatus for wireless communications, comprising:

means for obtaining one or more low-density parity-check (LDPC) matrices having square sub-matrices, wherein at least one of the square sub-matrices comprises rows and columns of blocks, and wherein the at least one of the square sub-matrices comprises only one non-zero block per row and only one non-zero block per column;

means for encoding data at one or more rates using the one or more LDPC matrices to generate a packet of encoded data; and

means for transmitting the packet.

24. The apparatus of claim 23 , wherein the LDPC matrices are rate half.

25. The apparatus of claim 23 , wherein:

the LDPC matrices are of a first rate of the one or more rates; and

at least two rows of blocks of one or more of the LDPC matrices are combined to generate one or more other LDPC matrices of a second rate of the one or more rates, the second rate being different from the first rate.

26. The apparatus of claim 25 , wherein the second rate is A/B, A and B are positive integers and A is less than B.

27. The apparatus of claim 23 , wherein each block comprises a zero square matrix or a cyclic shift of an identity matrix.

28. The apparatus of claim 23 , wherein each square sub-matrix has a dimension of one of 3×3 blocks, 4×4 blocks and 5×5 blocks.

29. The apparatus of claim 23 , wherein some of the square sub-matrices comprise all zero blocks.

30. The apparatus of claim 23 , wherein:

at least one of the LDPC matrices of size R×C blocks comprises a first portion of size R×C 1 blocks and a second portion of size R×C 2 blocks;

C 1 +C 2 =C ; and

the first portion comprises only one non-zero block per column of blocks.

31. The apparatus of claim 23 , further comprising:

means for generating the one or more LDPC matrices from another LDPC matrix of size K base ×N base square sub-matrices, and

wherein each of the K base ×N base square sub-matrices comprises rows and columns of blocks, and further wherein each of the K base ×N base square sub-matrices comprises only one non-zero block per row and only one non-zero block per column.

32. The apparatus of claim 31 , wherein the means for generating comprises:

means for replacing at least some of the non-zero blocks with zero blocks of the same size.

33. The apparatus of claim 31 , wherein the means for generating comprises:

means for combining at least two rows of blocks of the another LDPC matrix to obtain a second LDPC matrix of a rate that is higher than a rate of the another LDPC matrix; and

means for replacing at least some of the non-zero blocks of the second LDPC matrix of the higher rate with zero blocks of the same size.

34. A computer-program product for wireless communications, comprising a non-transitory computer-readable medium encoded with instructions executable to:

obtain one or more low-density parity-check (LDPC) matrices having square sub-matrices, wherein at least one of the square sub-matrices comprises rows and columns of blocks, and wherein the at least one of the square sub-matrices comprises only one non-zero block per row and only one non-zero block per column;

encode data at one or more rates using the one or more LDPC matrices to generate a packet of encoded data; and

transmit the packet.

35. A wireless node, comprising:

at least one antenna;

a circuit configured to obtain one or more low-density parity-check (LDPC) matrices having square sub-matrices, wherein at least one of the square sub-matrices comprises rows and columns of blocks, and wherein the at least one of the square sub-matrices comprises only one non-zero block per row and only one non-zero block per column;

an encoder configured to encode data at one or more rates using the one or more LDPC matrices to generate a packet of encoded data; and

a transmitter configured to transmit the packet via the at least one antenna.