IP Library › Granted Patent US 8,395,204
Granted Patent B2
US 8,395,204 · App. 13/233,993 · Granted Mar 12, 2013

Power semiconductor device

Inventor: Yusuke Kawaguchi (Kanagawa-ken, JP)
Assignee: Kabushiki Kaisha Toshiba
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Quick Facts
Patent No.
US 8,395,204
App. No.
13/233,993
Granted
Mar 12, 2013
Kind
B2
Abstract

According to one embodiment, a semiconductor device, includes an element unit including a vertical-type MOSFET, the vertical-type MOSFET in including a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a fourth semiconductor layer, a fifth semiconductor layer sequentially stacked in order, an impurity concentration of the second semiconductor layer being lower than the first semiconductor layer, an insulator covering inner surfaces of a plurality of trenches, the adjacent trenches being provided with a first interval in between, and a diode unit including basically with the units of the element unit, the adjacent trenches being provided with a second interval in between, the second interval being larger than the first interval.

Claims (57)

1. A power semiconductor device, comprising:

an element unit comprising a vertical-type MOSFET,

the vertical-type MOSFET comprising,

a first semiconductor layer with a first conductivity type,

a second semiconductor layer with the first conductivity type provided on a first main surface of the first semiconductor layer, an impurity concentration of the second semiconductor layer being lower than the first semiconductor layer,

a third semiconductor layer with a second conductivity type provided on a surface of the second semiconductor layer,

a fourth semiconductor layer with a first conductivity type selectively provided on a surface of the third semiconductor layer,

a fifth semiconductor layer with the second conductivity type selectively provided on the surface of the third semiconductor layer,

an insulator covering inner surfaces of a plurality of trenches, each trench penetrating the third semiconductor layer from a surface of the fourth semiconductor layer or a surface of the fifth semiconductor layer reaching the second semiconductor layer, the adjacent trenches being provided with a first interval in between,

a first embedded conductive layer embedded at a bottom of the trench via the insulator,

a second embedded conductive layer embedded at an upper portion of the first embedded conductive layer via the insulator,

an interlayer insulator provided on the second embedded conductive layer,

a first main electrode provided on a second main surface of the first semiconductor layer opposed to the first main surface, the first main electrode electrically connecting to the first semiconductor layer,

a second main electrode provided on the a fourth semiconductor layer, the fifth semiconductor layer and the interlayer insulator, the second main electrode electrically connecting to the fourth semiconductor layer and the fifth semiconductor layer; and

a diode unit adjacent to the element unit comprising,

the first semiconductor layer, the second insulator semiconductor layer, the third semiconductor layer, the fifth semiconductor layer, the insulator covering the inner surfaces of the plurality of the trenches, the adjacent trenches being provided with a second interval in between, the second interval being larger than the first interval, the first embedded conductive layer, the second embedded conductive layer, the interlayer insulator, the first main electrode, and the second main electrode.

2. The power semiconductor device of claim 1 , further comprising:

the insulator is provided between the first embedded conductive layer and the second embedded conductive layer.

3. The power semiconductor device of claim 1 , wherein

electrical potential of the first embedded conductive layer is the same as electrical potential of the second embedded conductive layer.

4. The power semiconductor device of claim 1 , wherein

the first embedded conductive layer is connected to the second main electrode.

5. The power semiconductor device of claim 1 , wherein

the first embedded conductive layer is a gate electrode.

6. The power semiconductor device of claim 1 , wherein

a first film thickness of the insulator being contact with a sidewall of the first embedded conductive layer is thicker than a second film thickness of the insulator being contact with a sidewall of the second embedded conductive layer.

7. The power semiconductor device of claim 1 , wherein

a width of the first embedded conductive layer is wider than a width of the second embedded conductive layer.

8. The power semiconductor device of claim 1 , wherein

both the first embedded conductive layer and the second embedded conductive layer are connected each other and act as gate electrodes.

9. The power semiconductor device of claim 1 , wherein

the fourth semiconductor layer and the fifth semiconductor layer are alternately arranged to a longitudinal direction of the trench in the element unit.

10. The power semiconductor device of claim 1 , wherein

a breakdown voltage of the diode unit is set to be lower than a breakdown voltage of the element unit.

11. A power semiconductor device, comprising:

an element unit comprising a vertical-type MOSFET,

the vertical-type MOSFET comprising,

a first semiconductor layer with a first conductivity type,

a second semiconductor layer with the first conductivity type provided on a first main surface of the first semiconductor layer, an impurity concentration of the second semiconductor layer being lower than the first semiconductor layer,

a third semiconductor layer with a second conductivity type provided on a surface of the second semiconductor layer,

a fourth semiconductor layer with a first conductivity type selectively provided on a surface of the third semiconductor layer,

a fifth semiconductor layer with the second conductivity type selectively provided on the surface of the third semiconductor layer,

an insulator covering inner surfaces of a plurality of trenches, each trench penetrating the third semiconductor layer from a surface of the fourth semiconductor layer or a surface of the fifth semiconductor layer reaching the second semiconductor layer, a film thickness of a sidewall at a bottom side of the insulator opposed to the second semiconductor layer being thicker than a film thickness of a sidewall at an upper side of the insulator, the adjacent trenches being provided with a first interval in between,

an embedded conductive layer embedded in the trench via the insulator,

an interlayer insulator provided on the embedded conductive layer,

a first main electrode provided on a second main surface of the first semiconductor layer opposed to the first main surface, the first main electrode electrically connecting to the first semiconductor layer,

a second main electrode provided on the a fourth semiconductor layer, the fifth semiconductor layer and the interlayer insulator, the second main electrode electrically connecting to the fourth semiconductor layer and the fifth semiconductor layer; and

a diode unit adjacent to the element unit comprising,

the first semiconductor layer, the second insulator semiconductor layer, the third semiconductor layer, the fifth semiconductor layer, the insulator covering the inner surfaces of the plurality of the trenches, the adjacent trenches being provided with a second interval in between, the second interval being larger than the first interval, the first embedded conductive layer, the second embedded conductive layer, the interlayer insulator, the first main electrode, and the second main electrode.

12. The power semiconductor device of claim 11 , wherein

the embedded conductive layer is a gate electrode.

13. The power semiconductor device of claim 11 , wherein

a width of the embedded conductive layer being in contact with a sidewall at a bottom side of the insulator is wider than a width of the embedded conductive layer being in contact with a sidewall at an upper side of the insulator, a thickness of the sidewall at the bottom side being thicker and a thickness of the sidewall at the upper side being thinner.

14. The power semiconductor device of claim 11 , wherein

the fourth semiconductor layer and the fifth semiconductor layer are alternately arranged to a longitudinal direction of the trench in the element unit.

15. The power semiconductor device of claim 11 , wherein

a breakdown voltage of the diode unit is set to be lower than a breakdown voltage of the element unit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 15, 2011
From: KAWAGUCHI, YUSUKE
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 026914/0988 →
Priority Claims (1)
JP P2010-209160 · Sep 17, 2010 · national
Continuity (1)
Related Publication 20120068248A1 · Mar 22, 2012