IP Library Granted Patent US 8,404,562
Granted Patent B2
US 8,404,562 · App. 12/894,344 · Granted Mar 26, 2013

Method for manufacturing a composite wafer having a graphite core, and composite wafer having a graphite core

Inventors: Rudolf Berger (Regensburg, DE); Hermann Gruber (Woerth a.D., DE); Wolfgang Lehnert (Lintach, DE); Guenther Ruhl (Regensburg, DE); Raimund Foerg (Straubing, DE); Anton Mauder (Kolbermoor, DE); Hans-Joachim Schulze (Taufkirchen, DE)
Assignee: Infineon Technologies AG
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,404,562
App. No.
12/894,344
Granted
Mar 26, 2013
Kind
B2
Abstract

According to an embodiment, a composite wafer includes a carrier substrate having a graphite core and a monocrystalline semiconductor layer attached to the carrier substrate.

Claims (38)

1. A method for manufacturing a composite wafer, comprising:

providing a monocrystalline semiconductor wafer comprising a first side and a second side arranged opposite the first side;

depositing a moulding composition comprising at least one of carbon powder and pitch on the second side of the semiconductor wafer; and

annealing the deposited moulding composition to form a graphite carrier attached to the semiconductor wafer.

2. A method according to claim 1 , wherein the moulding composition further comprises a binder.

3. A method according to claim 1 , wherein depositing a moulding composition comprises at least one of injection moulding and compression moulding.

4. A method according to claim 1 , wherein annealing the deposited moulding composition comprises a first annealing process in a first temperature range and a subsequent second annealing process in a second temperature range different than the first temperature range.

5. A method according to claim 1 , further comprising:

forming a first protective layer at least on the first side of the monocrystalline semiconductor wafer prior to depositing the moulding composition.

6. A method according to claim 5 , further comprising:

removing the first protective layer from the monocrystalline semiconductor wafer after depositing the moulding composition or after annealing the deposited moulding composition.

7. A method according to claim 1 , further comprising:

forming a second protective layer at least on the graphite carrier.

8. A method according to claim 1 , further comprising:

forming an intermediate layer on the second side of the monocrystalline semiconductor wafer; and

depositing the moulding composition on the intermediate layer.

9. A method according to claim 1 , further comprising:

forming a recess in the second side of the monocrystalline semiconductor wafer; and

depositing the moulding composition into the recess.

10. A method according to claim 9 , wherein forming a recess comprises:

grinding the second side of the monocrystalline semiconductor wafer; and

etching the monocrystalline semiconductor wafer at the second side.

11. A method according to claim 1 , further comprising:

forming a doping region at the first side of the monocrystalline semiconductor wafer, the doping region forming an etch stop layer;

forming an epitaxial semiconductor layer on the first side of the monocrystalline semiconductor wafer; and

etching the material of the monocrystalline semiconductor wafer at the second side selectively with respect to the etch stop layer.

12. A method according to claim 11 , further comprising:

grinding the second side of the monocrystalline semiconductor wafer after forming the epitaxial semiconductor layer.

13. A method according to claim 1 , further comprising:

reducing the thickness of the monocrystalline semiconductor wafer by removing semiconductor material at the first side of the monocrystalline semiconductor wafer.

14. A method for manufacturing a composite wafer, comprising:

providing a monocrystalline semiconductor wafer comprising a first side and a second side arranged opposite the first side;

implanting gas ions into the first side of the monocrystalline semiconductor wafer to form a delamination layer at a predefined depth in the monocrystalline semiconductor wafer;

depositing a moulding composition comprising at least one of carbon powder and pitch on the first side of the monocrystalline semiconductor wafer; and

subjecting the monocrystalline semiconductor wafer and the moulding composition to at least one heat treatment to form a graphite carrier attached to the first side of the semiconductor wafer and split the monocrystalline semiconductor wafer along the delamination layer.

15. A method according to claim 14 , wherein the gas ions are implanted into the first side of the monocrystalline semiconductor wafer using implantation energy of no more than 150 keV.

16. A method according to claim 14 , wherein splitting of the monocrystalline semiconductor wafer results in the formation of a monocrystalline semiconductor layer which remains attached to the graphite carrier, the monocrystalline semiconductor layer comprising an exposed side, the method further comprising:

forming an epitaxial semiconductor layer on the exposed side of the monocrystalline semiconductor layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 18, 2013
From: INFINEON TECHNOLOGIES AUSTRIA AG
To: INFINEON TECHNOLOGIES AG
Reel/Frame 029824/0275 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2010
From: BERGER, RUDOLF, DR.; GRUBER, HERMANN, MR.; LEHNERT, WOLFGANG, MR.; RUHL, GUENTHER, DR.; FOERG, RAIMUND, MR.; MAUDER, ANTON, DR; SCHULZE, HANS-JOACHIM, DR.
To: INFINEON TECHNOLOGIES AUSTRIA AG
Reel/Frame 025237/0084 →
Continuity (1)
Related Publication 20120080690A1 · Apr 5, 2012