IP Library Granted Patent US 8,410,538
Granted Patent B2
US 8,410,538 · App. 12/834,390 · Granted Apr 2, 2013

Semiconductor memory device and method for manufacturing same

Inventors: Megumi Ishiduki (Mie-ken, JP); Yoshiaki Fukuzumi (Kanagawa-ken, JP); Ryota Katsumata (Mie-ken, JP); Masaru Kidoh (Mie-ken, JP); Masaru Kito (Kanagawa-ken, JP); Hideaki Aochi (Kanagawa-ken, JP)
Assignee: Kabushiki Kaisha Toshiba
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,410,538
App. No.
12/834,390
Granted
Apr 2, 2013
Kind
B2
Abstract

According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a memory film, and a SiGe film. The stacked body includes a plurality of conductive layers and a plurality of insulating layers alternately stacked above the substrate. The memory film includes a charge storage film. The memory film is provided on a sidewall of a memory hole punched through the stacked body. The SiGe film is provided inside the memory film in the memory hole.

Claims (15)

1. A semiconductor memory device comprising:

a substrate;

a stacked body including a plurality of conductive layers and a plurality of insulating layers alternately stacked above the substrate;

a memory film including a charge storage film and provided on a sidewall of a memory hole punched through the stacked body; and

a SiGe film provided inside the memory film in the memory hole, the SiGe film having a relatively high Ge concentration on a central axis side of the memory hole.

2. The device according to claim 1 , further comprising:

a silicon oxide film provided on a side surface of the SiGe film on an opposite side to the memory film.

3. The device according to claim 1 , further comprising:

a select gate stacked on the stacked body;

a gate insulating film provided on a side surface of a hole punched through the select gate immediately above the memory hole; and

a channel film provided inside the gate insulating film in the hole.

4. The device according to claim 3 , wherein the channel film is a SiGe film provided integrally with the SiGe film.

5. The device according to claim 3 , wherein the channel film is a silicon film.

6. The device according to claim 5 , wherein the silicon film is in contact with a side surface of an upper end portion of the SiGe film.

7. The device according to claim 5 , wherein the gate insulating film is a silicon nitride film.

Assignments (5)
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043709/0035 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 12, 2010
From: ISHIDUKI, MEGUMI; FUKUZUMI, YOSHIAKI; KATSUMATA, RYOTA; KIDOH, MASARU; KITO, MASARU; AOCHI, HIDEAKI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 024667/0112 →
Priority Claims (1)
JP 2010-060803 · Mar 17, 2010 · national
Continuity (1)
Related Publication 20110227140A1 · Sep 22, 2011