Method of implementing memristor-based multilevel memory using reference resistor array
The present invention relates to a memristor, and more particularly, to a method of implementing a memristor-based multilevel memory using a reference resistor array and a write-in circuit and a read-out/restoration circuit for the memristor-based multilevel memory, in which a memristor can be used as a multilevel memory. In the present invention, a reference resistance value is written in a selected memristor of a memristor array by applying repeatedly the current pulses of which widths are proportional to the difference between the resistances of the selected memristor and the selected node of the reference resistor array.
1. A method of implementing a memristor-based multilevel memory using a reference resistor array, the method comprising the steps of:
in a way making a resistance value of the memristor selected from among memristors of a memristor array equal to the reference resistance value of a node selected from among nodes of the reference resistor array, writing the reference resistance value in the selected memristor; and
when the reference resistance value written in the selected memristor is deviated from the originally stored resistance value, restoring the resistance value of the selected memristor to the originally stored resistance value by making the resistance value of the selected memristor equal to the closest reference resistance value among all the nodes of the reference resistor array.
2. The method as claimed in claim 1 , wherein the memristors are all the resistance-based memories, in which ReRAM and RRAM are included.
3. The method as claimed in claim 1 , wherein the reference resistor array is implemented by connecting a plurality of resistors in series or forming tabs in middle of a resistant line so that a resistor serial connection effect can be realized.
4. The method as claimed in claim 1 , wherein the reference resistance value at the selected node of a reference resistor array is the sum of resistances from a ground to the selected node.
5. The method as claimed in claim 1 , wherein the step of writing the reference resistance value of the selected memristor comprises the steps of:
Step a: applying the same currents i s (t) to both the reference resistor array and the selected memristor of the memristor array;
Step b: if the absolute difference value between the voltage of the selected node of the reference resistor array and the voltage of the selected memristor of the memristor array is larger than a predetermined threshold, applying a programming current pulse i P (t) to the selected memristor of the memristor array 130 and repeating from step a.
6. The method as claimed in claim 5 , wherein the step of applying the programming current pulses i P (t) to the selected memristor comprises the steps of:
Generating the current pulse i P (t) whose pulse width is proportional to the difference between the voltage of the selected memristor and that of the selected node among the nodes of reference resistor array;
applying the current pulses i P (t) to the selected memristor in a direction in which the resistance value of the selected memristor approaches the resistance of the selected node of reference resistor array.