Oxide semiconductor device
A semiconductor device having a structure which enables sufficient reduction in parasitic capacitance is provided. In addition, the operation speed of thin film transistors in a driver circuit is improved. In a bottom-gate thin film transistor in which an oxide insulating layer is in contact with a channel formation region in an oxide semiconductor layer, a source electrode layer and a drain electrode layer are formed in such a manner that they do not overlap with a gate electrode layer. Thus, the distance between the gate electrode layer and the source electrode layer and between the gate electrode layer and the drain electrode layer are increased; accordingly, parasitic capacitance can be reduced.
1. A semiconductor device comprising:
a gate electrode layer over an insulating surface;
a gate insulating layer over the gate electrode layer;
a source electrode layer and a drain electrode layer over the gate insulating layer;
an oxide semiconductor layer over the gate insulating layer and overlapping above parts of the source electrode layer and the drain electrode layer; and
an oxide insulating layer over the oxide semiconductor layer,
wherein the oxide semiconductor layer includes a channel formation region over the gate electrode layer,
wherein the source electrode layer and the drain electrode layer do not overlap with the gate electrode layer,
wherein side surfaces of the source electrode layer and the drain electrode layer are in contact with parts of the oxide semiconductor layer, and
wherein the oxide insulating layer is in contact with the channel formation region in the oxide semiconductor layer.
2. The semiconductor device according to claim 1 ,
wherein the oxide insulating layer covers opposite ends of the oxide semiconductor layer in a channel length direction.
3. The semiconductor device according to claim 1 ,
wherein the oxide insulating layer covers outer end portions of the source electrode layer and the drain electrode layer in a channel length direction.
4. The semiconductor device according to claim 1 ,
wherein each of the source electrode layer and the drain electrode layer comprises a film including an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W as a main component, or a stacked-layer structure including films thereof.
5. The semiconductor device according to claim 1 ,
wherein each of the source electrode layer and the drain electrode layer comprises indium oxide, an indium oxide-tin oxide alloy, an indium oxide-zinc oxide alloy, or zinc oxide.
6. The semiconductor device according to claim 1 ,
wherein a width of the channel formation region in a channel length direction is smaller than a width of the gate electrode layer in the channel length direction.
7. The semiconductor device according to claim 1 ,
wherein the oxide insulating layer comprises a silicon oxide film, an aluminum oxide film, or an aluminum oxynitride film.
8. A semiconductor device comprising:
a gate electrode layer over an insulating surface;
a gate insulating layer over the gate electrode layer;
a source electrode layer and a drain electrode layer over the gate insulating layer;
an oxide semiconductor layer over the gate insulating layer and overlapping above parts of the source electrode layer and the drain electrode layer;
an oxide insulating layer over the oxide semiconductor layer; and
a protective insulating layer over the oxide insulating layer and the oxide semiconductor layer,
wherein the oxide semiconductor layer includes a channel formation region over the gate electrode layer,
wherein the source electrode layer and the drain electrode layer do not overlap with the gate electrode layer,
wherein side surfaces of the source electrode layer and the drain electrode layer are in contact with parts of the oxide semiconductor layer,
wherein the oxide insulating layer is in contact with the channel formation region in the oxide semiconductor layer, and
wherein the protective insulating layer is in contact with part of a top surface of the oxide semiconductor layer.
9. The semiconductor device according to claim 8 ,
wherein the oxide insulating layer covers opposite ends of the oxide semiconductor layer in a channel length direction.
10. The semiconductor device according to claim 8 ,
wherein the oxide insulating layer covers outer end portions of the source electrode layer and the drain electrode layer in a channel length direction.
11. The semiconductor device according to claim 8 ,
wherein each of the source electrode layer and the drain electrode layer comprises a film including an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W as a main component, or a stacked-layer structure including films thereof.
12. The semiconductor device according to claim 8 ,
wherein each of the source electrode layer and the drain electrode layer comprises indium oxide, an indium oxide-tin oxide alloy, an indium oxide-zinc oxide alloy, or zinc oxide.
13. The semiconductor device according to claim 8 ,
wherein a width of the channel formation region in a channel length direction is smaller than a width of the gate electrode layer in the channel length direction.
14. The semiconductor device according to claim 8 ,
wherein the oxide insulating layer comprises a silicon oxide film, an aluminum oxide film, or an aluminum oxynitride film.
15. The semiconductor device according to claim 8 ,
wherein the protective insulating layer comprises a silicon nitride film or an aluminum nitride film.
16. A semiconductor device comprising:
a gate electrode layer over an insulating surface;
a gate insulating layer over the gate electrode layer;
a source electrode layer and a drain electrode layer over the gate insulating layer;
an oxide semiconductor layer over the gate insulating layer so as to be in contact with the source electrode layer and the drain electrode layer;
an oxide insulating layer over the oxide semiconductor layer; and
a protective insulating layer over the oxide insulating layer and the oxide semiconductor layer,
wherein the oxide semiconductor layer includes a channel formation region over the gate electrode layer,
wherein the source electrode layer and the drain electrode layer do not overlap with the gate electrode layer,
wherein the oxide insulating layer is in contact with the channel formation region in the oxide semiconductor layer, and
wherein the oxide insulating layer has an opening so as to expose parts of the oxide semiconductor layer.
17. The semiconductor device according to claim 16 ,
wherein the oxide insulating layer covers opposite ends of the oxide semiconductor layer in a channel length direction.
18. The semiconductor device according to claim 16 ,
wherein the oxide insulating layer covers outer end portions of the source electrode layer and the drain electrode layer in a channel length direction.
19. The semiconductor device according to claim 16 ,
wherein each of the source electrode layer and the drain electrode layer comprises a film including an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W as a main component, or a stacked-layer structure including films thereof.
20. The semiconductor device according to claim 16 ,
wherein each of the source electrode layer and the drain electrode layer comprises indium oxide, an indium oxide-tin oxide alloy, an indium oxide-zinc oxide alloy, or zinc oxide.
21. The semiconductor device according to claim 16 ,
wherein a width of the channel formation region in a channel length direction is smaller than a width of the gate electrode layer in the channel length direction.
22. The semiconductor device according to claim 16 ,
wherein the oxide insulating layer comprises a silicon oxide film, an aluminum oxide film, or an aluminum oxynitride film.
23. The semiconductor device according to claim 16 ,
wherein the protective insulating layer comprises a silicon nitride film or an aluminum nitride film.