Semiconductor device with two oxide semiconductor layers and manufacturing method thereof
In a bottom-gate thin film transistor using the stack of the first oxide semiconductor layer and the second oxide semiconductor layer, an oxide insulating layer serving as a channel protective layer is formed over and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the insulating layer, an oxide insulating layer covering a peripheral portion (including a side surface) of the stack of the oxide semiconductor layers is formed.
1. A semiconductor device comprising:
a gate electrode layer provided over an insulating surface;
a gate insulating layer provided over the gate electrode layer;
a first oxide semiconductor layer provided over the gate insulating layer;
a second oxide semiconductor layer provided over and in contact with the first oxide semiconductor layer;
an oxide insulating layer provided over the second oxide semiconductor layer;
a source electrode layer and a drain electrode layer which are provided over the oxide insulating layer, and are in contact with the second oxide semiconductor layer;
a planarizing insulating layer provided over the source electrode layer and the drain electrode layer; and
a conductive layer provided over the planarizing insulating layer and connected with the gate electrode layer,
wherein the oxide insulating layer includes a first region and a second region,
wherein the first region is in contact with the second oxide semiconductor layer so as to overlap with the gate electrode layer, and
wherein the second region is in contact with the second oxide semiconductor layer so as to cover end portions of the second oxide semiconductor layer.
2. The semiconductor device according to claim 1 , wherein the oxide insulating layer is formed using silicon oxide or aluminum oxide formed by a sputtering method.
3. The semiconductor device according to claim 1 , wherein the source electrode layer and the drain electrode layer are formed using a film including an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W as its component, or a stacked-layer film including a combination of alloy films of these elements.
4. The semiconductor device according to claim 1 , wherein the source electrode layer and the drain electrode layer are formed using indium oxide, an alloy of indium oxide and tin oxide, an alloy of indium oxide and zinc oxide, or zinc oxide.
5. The semiconductor device according to claim 1 , further comprising:
a capacitor portion over the insulating surface; and
a capacitor wiring and a capacitor electrode overlapping with each other and included in the capacitor portion,
wherein the capacitor wiring and the capacitor electrode have a light-transmitting property.
6. The semiconductor device according to claim 1 , wherein the semiconductor device is incorporated into one selected from the group consisting of an electronic book reader, a television set, a digital photo frame, a game machine, a slot machine, a portable computer, and a mobile phone.
7. The semiconductor device according to claim 1 , wherein the oxide insulating layer is formed using a silicon nitride oxide or aluminum oxynitride.
8. The semiconductor device according to claim 1 , wherein an average total thickness of the first oxide semiconductor layer and the second oxide semiconductor layer is 3 nm to 30 nm.
9. A semiconductor device comprising:
a gate electrode layer provided over an insulating surface;
a gate insulating layer provided over the gate electrode layer;
a first oxide semiconductor layer provided over the gate insulating layer;
a second oxide semiconductor layer provided over and in contact with the first oxide semiconductor layer;
an oxide insulating layer provided over the second oxide semiconductor layer;
a source electrode layer and a drain electrode layer which are provided over the oxide insulating layer, and are in contact with the second oxide semiconductor layer; and
a protective insulating layer provided over and in contact with the source electrode layer and the drain electrode layer,
wherein the oxide insulating layer includes a first region and a second region,
wherein the first region is in contact with the second oxide semiconductor layer so as to overlap with the gate electrode layer, and
wherein the second region is in contact with the second oxide semiconductor layer so as to cover end portions of the second oxide semiconductor layer.
10. The semiconductor device according to claim 9 , wherein the protective insulating layer is formed using silicon nitride, aluminum oxide, or aluminum nitride formed by a sputtering method.
11. The semiconductor device according to claim 9 , wherein the oxide insulating layer is formed using silicon oxide or aluminum oxide formed by a sputtering method.
12. The semiconductor device according to claim 9 , wherein the source electrode layer and the drain electrode layer are formed using a film including an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W as its component, or a stacked-layer film including a combination of alloy films of these elements.
13. The semiconductor device according to claim 9 , wherein the source electrode layer and the drain electrode layer are formed using indium oxide, an alloy of indium oxide and tin oxide, an alloy of indium oxide and zinc oxide, or zinc oxide.
14. The semiconductor device according to claim 9 , further comprising:
a capacitor portion over the insulating surface; and
a capacitor wiring and a capacitor electrode overlapping with each other and included in the capacitor portion, wherein the capacitor wiring and the capacitor electrode have a light-transmitting property.
15. The semiconductor device according to claim 9 , wherein the semiconductor device is incorporated into one selected from the group consisting of an electronic book reader, a television set, a digital photo frame, a game machine, a slot machine, a portable computer, and a mobile phone.
16. The semiconductor device according to claim 9 , wherein the oxide insulating layer is formed using a silicon nitride oxide or aluminum oxynitride.
17. The semiconductor device according to claim 9 , wherein an average total thickness of the first oxide semiconductor layer and the second oxide semiconductor layer is 3 nm to 30 nm.
18. The semiconductor device according to claim 9 , further comprising:
a planarizing insulating layer provided over the protective insulating layer; and
a conductive layer provided over the planarizing insulating layer and connected with the gate electrode layer.
19. A method for manufacturing a semiconductor device, comprising:
forming a gate electrode layer over an insulating surface;
forming a gate insulating layer over the gate electrode layer;
forming a first oxide semiconductor layer over the gate insulating layer;
forming a second oxide semiconductor layer over and in contact with the first oxide semiconductor layer;
forming an oxide insulating layer over the second oxide semiconductor layer; and
in contact with over the second oxide semiconductor layer; and
forming a source electrode layer and a drain electrode layer which are provided over the oxide insulating layer, and are in contact with the second oxide semiconductor layer,
wherein the oxide insulating layer includes a first region and a second region,
wherein the first region is in contact with the second oxide semiconductor layer so as to overlap with the gate electrode layer, and
wherein the second region is in contact with the second oxide semiconductor layer so as to cover end portions of the second oxide semiconductor layer.
20. A method for manufacturing a semiconductor device, comprising:
forming a gate electrode layer over an insulating surface;
forming a gate insulating layer over the gate electrode layer;
forming a first oxide semiconductor layer over the gate insulating layer;
forming a second oxide semiconductor layer over and in contact with the first oxide semiconductor layer;
forming an oxide insulating layer provided over the second oxide semiconductor layer;
forming a source electrode layer and a drain electrode layer which are provided over the oxide insulating layer, and are in contact with the second oxide semiconductor layer; and
forming a protective insulating layer over the source electrode layer and the drain electrode layer,
wherein the oxide insulating layer includes a first region and a second region,
wherein the first region is in contact with the second oxide semiconductor layer so as to overlap with the gate electrode layer, and
wherein the second region is in contact with the second oxide semiconductor layer so as to cover end portions of the second oxide semiconductor layer.