Semiconductor integrated circuit device

1. A semiconductor integrated circuit device, comprising:

a power source circuit that is connected to a terminal of a first high potential side power source and that outputs a voltage of a second high potential side power source;

an output transistor that includes a first terminal, a second terminal that is connected to a terminal of a low potential side power source, and a control terminal and that outputs an output signal from the first terminal to an output terminal;

a first diode that includes a cathode connected to the terminal of the first high potential side power source and an anode connected to the output terminal;

a connection circuit that is connected between a terminal of the second high potential side power source and the terminal of the low potential side power source, and in which a current source and a capacitor are arranged in a cascade connection; and

a logic circuit to which a signal obtained from a connection node of the current source and the capacitor and a control signal that controls on/off operations of the output transistor are inputted and which outputs a signal obtained by a logic operation to the control terminal of the output transistor.

2. The semiconductor integrated circuit device of claim 1 , wherein

the logic circuit is an NAND logic circuit.

3. The semiconductor integrated circuit device of claim 2 , wherein the NAND logic circuit includes:

a first P-channel transistor that includes a gate connected to the connection node and a source connected to the terminal of the second high potential side power source;

a first N-channel transistor that includes a gate connected to the connection node and a source connected to the terminal of the low potential side power source;

a second P-channel transistor that includes to a gate to which the control signal is inputted, a source connected to the terminal of the second high potential side power source, and a drain connected to a drain of the first P-channel transistor and the control terminal of the output transistor; and

a second N-channel transistor that includes a gate to which the control signal is inputted, a source connected to a drain of the first N-channel transistor, and a drain connected to a drain of the second P-channel transistor.

4. The semiconductor integrated circuit device of claim 2 , wherein

inverters are connected between the NAND logic circuit and the output transistor.

5. The semiconductor integrated circuit device of claim 2 , wherein the NAND logic circuit includes:

a first NPN transistor that includes a base electrically connected to the connection node and an emitter electrically connected to the terminal of the low potential side power source; and

a second NPN transistor that includes a base to which the control signal is inputted, an emitter electrically connected to a collector of the first NPN transistor, and a collector electrically connected to the terminal of the second high potential side power source and the control terminal of the output transistor.

6. The semiconductor integrated circuit device of claim 1 , wherein

the output transistor is either an N-channel transistor in an open-drain structure or an NPN transistor in an open-collector structure.

7. The semiconductor integrated circuit device of claim 6 , wherein

the N-channel transistor in the open-drain structure is a DMOS transistor.

8. The semiconductor integrated circuit device of claim 1 , wherein

the current source is configured with a current mirror circuit.

9. The semiconductor integrated circuit device of claim 1 , further comprising:

an internal circuit that outputs the control signal.

10. The semiconductor integrated circuit device of claim 9 , wherein

the internal circuit outputs the control signal that is obtained by a logical operation process performed on an input signal.

11. The semiconductor integrated circuit device of claim 1 , wherein

when a positive ESD voltage is applied to the output terminal, the power source circuit increases a voltage of the second high potential side power source, and the logic circuit outputs a high level signal to the control terminal of the output transistor so as to turn on the output transistor.

12. The semiconductor integrated circuit device of claim 1 , wherein

the logic circuit is configured with inverters and a 2-input NOR circuit.

13. The semiconductor integrated circuit device of claim 6 , wherein

a second diode is incorporated in the N-channel transistor in the open-drain structure,

a cathode of the second diode is connected to a drain of the N-channel transistor, and

an anode of the second diode is connected to a source of the N-channel transistor.

14. The semiconductor integrated circuit device of claim 3 , wherein

a capacitance of the capacitor is larger than a gate capacitance of the first P-channel transistor and larger than a gate capacitance of the first N-channel transistor.

15. A semiconductor integrated circuit device, comprising:

a power source circuit that is configured to receive a voltage of a first high potential side power source and to output a voltage of a second high potential side power source based on the voltage of the first high potential side power source;

an internal circuit that is configured to output a first control signal based on a received input signal and based on the voltage of the second high potential side power source;

a connection circuit that is configured to output a second control signal based on the voltage of the second high potential side power source;

a logic circuit that receives the first and second control signals, and that performs a logical operation based on the first and second control signals to output a logic signal; and

an output circuit that is configured to receive the logic signal from the logic circuit, be turned on when the logic signal indicates the presence of a surge voltage at a device output terminal, and, when turned on, dissipate the surge voltage to a side of the low potential side power source to thereby protect the internal circuit from the surge voltage.

16. The semiconductor integrated circuit device of claim 15 , wherein

the power source circuit is connected between the first high potential side power source and the low potential side power source,

the internal circuit, the connection circuit and the logic circuit are connected between the second high potential side power source and the low potential side power source, and

the output circuit is connected between the device output terminal and the low potential side power source.

17. The semiconductor integrated circuit device of claim 16 , further comprising:

a protection diode that is connected between the high potential side power source and the device output terminal and that is biased to cause the voltage of the first high potential side power source and the voltage of the second high potential side power source to instantaneously rise when the surge voltage is applied to the device output terminal, and to thereby cause the logic signal to turn on the output circuit.

18. The semiconductor integrated circuit device of claim 15 , wherein

the connection circuit includes a current source, a capacitor and a node between the current source and the capacitor that connects the connection circuit to the logic circuit, and

the connection circuit outputs the second control signal to the logic circuit when the surge voltage is present.

19. The semiconductor integrated circuit device of claim 15 , wherein

the logic circuit is at least one of a 2-input NAND circuit that includes four MOS transistors and 2-input NAND circuit that includes two NPN transistors and three resistors, and

the output circuit is at least one of an open drain type double diffusion MOS transistor that includes an output transistor and a diode and an open collector type NPN transistor.