IP Library › Granted Patent US 8,432,030
Granted Patent B2
US 8,432,030 · App. 13/171,788 · Granted Apr 30, 2013

Power electronic package having two substrates with multiple semiconductor chips and electronic components

Inventors: Rajesh Kumar Malhan (Nagoya, JP); C Mark Johnson (Derbyshire, GB); Cyril Buttay (Sheffield, GB); Jeremy Rashid (Singapore, SG); Florin Udrea (Cambridge, GB)
Assignees: DENSO CORPORATION; University of Cambridge; The University of Sheffield
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Quick Facts
Patent No.
US 8,432,030
App. No.
13/171,788
Granted
Apr 30, 2013
Kind
B2
Abstract

A power electronic package includes: first and second high thermal conductivity insulating non-planar substrates; and multiple semiconductor chips and electronic components between the substrates. Each substrate includes multiple electrical insulator layers and patterned electrical conductor layers connecting to the electronic components, and further includes multiple raised regions or posts, which are bonded together so that the substrates are mechanically and electrically connected. The number, arrangement, and shape of the raised regions or posts are adjusted to have mechanical separation between the substrates. The electrical conductor layers are separated and isolated one another so that multiple electric circuits are provided on at least one of the substrates.

Claims (22)

1. A power electronic package comprising:

first and second high thermal conductivity insulating non-planar substrates; and

a plurality of semiconductor chips and electronic components, which are disposed between the first and second high thermal conductivity insulating non-planar substrates, wherein

each of the first and second high thermal conductivity insulating non-planar substrates includes a plurality of electrical insulator layers and patterned electrical conductor layers, which are alternately stacked,

the electrical conductor layers are connected to the electronic components with mechanical and electrical connection,

each of the first and second high thermal conductivity insulating non-planar substrates further includes a plurality of recesses or wells,

the recesses or wells are disposed on predetermined regions of at least one of the first and second high thermal conductivity insulating non-planar substrates, the predetermined regions on which the electronic components are located,

the first and second high thermal conductivity insulating non-planar substrates are mechanically and electrically bonded with a plurality of bonding regions, and

the electrical conductor layers are separated and isolated one another so that a plurality of electric circuits is provided on at least one of the first and second high thermal conductivity insulating non-planar substrates.

2. The power electronic package according to claim 1 , wherein

one of the first and second high thermal conductivity insulating non-planar substrates includes a plurality of recesses,

the recesses are disposed on predetermined regions of the one of the first and second high thermal conductivity insulating non-planar substrates, the predetermined regions on which the electronic components are located,

the first and second high thermal conductivity insulating non-planar substrates are mechanically and electrically bonded with a plurality of bonding regions, and

the raised regions or posts provide the bonding regions.

3. The power electronic package according to claim 2 , wherein

the first high thermal conductivity insulating non-planar substrate has a planar surface without any recess.

4. The power electronic package according to claim 2 , wherein

the bonding regions include a plurality of electrically inactive bonding regions, and

the number of the electrically inactive bonding regions, arrangement of the electrically inactive bonding regions, and a shape of each electrically inactive bonding region are adjusted to have mechanical separation between the first and second high thermal conductivity insulating non-planar substrates.

5. The power electronic package according to claim 2 , wherein

each of the first and second high thermal conductivity insulating non-planar substrates further includes a non-bonding region, and

the non bonding region has a height, which is small than that of the bonding regions.

Continuity (2)
Division 11511516 · Aug 29, 2006
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