IP Library Granted Patent US 8,432,102
Granted Patent B2
US 8,432,102 · App. 11/961,836 · Granted Apr 30, 2013

Systems and methods for multi-state switch networks

Inventors: Jeffrey Terlizzi (Sunnyvale, CA); Nicholas R. Kalayjian (San Carlos, CA)
Assignee: Apple Inc.
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Quick Facts
Patent No.
US 8,432,102
App. No.
11/961,836
Granted
Apr 30, 2013
Kind
B2
Abstract

Systems and methods for multi-state switch networks and multi-state LED networks are provided. Systems and methods for maintaining the brightness of LEDs in multi-state LED networks are also provided. The multi-state networks contain control circuitry that can output a single control signal that is able to drive a pair of diodes in three different states. In a network of 2*N diodes, N wires are sufficient to drive the diodes in 3^N different states. The control circuitry may also include a pulse-width modulator that controls the perceived brightness of the LEDs in a multi-state LED network in response to a voltage level of the power source.

Claims (53)

1. A multi-state switch network comprising:

a serially-connected diode pair that receives a single control signal at a control node;

wherein the single control signal is operative to drive the serially-connected diode pair to one of at least three different states; and

wherein the single control signal is operative to alternatively:

turn ON a first diode of the diode pair and turn OFF a second diode of the diode pair when the single control signal is in a first state;

turn OFF the first diode and turn ON the second diode when the single control signal is in a second state; and

turn OFF the first diode and turn OFF the second diode when the single control signal is in a third state, wherein the third state comprises a high impedance state.

2. The multi-state switch network of claim 1 , wherein the serially-connected diode pair comprises a pair of LEDs.

3. The multi-state switch network of claim 2 , comprising a pulse-width modulator that modulates the single control signal to control a perceived brightness level of the pair of LEDs.

4. The multi-state switch network of claim 3 , wherein the pulse-width modulator is operative to adjust a duty cycle of the single control signal based on a monitored voltage level.

5. The multi-state switch network of claim 4 , wherein the pulse-width modulator is operative to increase the duty cycle of the single control signal based on a decrease in the monitored voltage level.

6. The multi-state switch network of claim 4 , wherein the pulse-width modulator is operative to decrease the duty cycle of the single control signal based on an increase in the monitored voltage level.

7. The multi-state switch network of claim 1 , wherein the serially-connected diode pair is operative to control a pair of switches.

8. The multi-state switch network of claim 1 , wherein:

the first state comprises a higher voltage state; and

the second state comprises lower voltage state.

9. The multi-state switch network of claim 1 , wherein the serially-connected diode pair consists essentially of two diodes and two resistors in serial communication.

10. The multi-state switch network of claim 1 , comprising a tri-state buffer that provides the control signal.

11. A plurality of serially-connected diode pairs as defined in claim 1 , each of the serially-connected diode pairs controlled by a single control signal.

12. The multi-state switch network of claim 1 , wherein the second state comprises a high voltage state.

13. The multi-state switch network of claim 1 , wherein the first state comprises a low voltage state.

14. The multi-state switch network of claim 1 , comprising:

a power source;

a ground source; and

a control node, wherein:

a first diode of the diode pair is serially coupled between the power source and the control node;

a second diode of the diode pair is serially coupled between the control node and the ground source; and

the diode pair receives the single control signal at the control node.

15. The multi-state switch network of claim 14 , comprising:

a first resistor; and

a second resistor, wherein:

the first resistor is serially coupled between the first diode and the control node; and

the second resistor is serially coupled between the second diode and the control node.

16. The multi-state switch network of claim 14 , comprising a first switch node serially coupled between the first diode and the control node.

17. The multi-state switch network of claim 16 , comprising a first switch coupled to the first switch node.

18. The multi-state switch network of claim 17 , wherein the first switch comprises one of a transistor switch, a buffer, and a logic circuit.

19. The multi-state switch network of claim 17 , comprising:

a second switch node serially coupled between the second diode and the control node; and

a second switch coupled to the first switch node.

20. A method of controlling a multi-state switch network comprising first and second diodes, the method comprising:

receiving a single control signal at a control node;

in response to the single control signal, alternatively:

turning ON the first diode and turning OFF the second diode when the single control signal is in a first state;

turning OFF the first diode and turning ON the second diode when the single control signal is in a second state; and

turning OFF the first diode and turning OFF the second diode when the single control signal is in a third state, wherein the third state comprises a high impedance state.

21. The method of claim 20 , wherein the first diode and the second diode are LEDs.

22. The method of claim 21 , comprising pulse-width modulating the single control signal to control a perceived brightness level of the LEDs.

23. The method of claim 22 , comprising:

monitoring a voltage level of a power source; and

adjusting a duty cycle of the control signal based on the monitored voltage level.

24. The method of claim 20 , comprising:

switching a first switch in response to turning ON the first diode; and

switching a second switch in response to turning ON the second diode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 20, 2007
From: TERLIZZI, JEFFREY; KALAYJIAN, NICHOLAS R.
To: APPLE INC.
Reel/Frame 020281/0795 →
Continuity (3)
Provisional Application 60878852 · Jan 5, 2007
Provisional Application 60937853 · Jun 28, 2007
Related Publication 20080164825A1 · Jul 10, 2008