Topside structures for an insulated gate bipolar transistor (IGBT) device to achieve improved device performances
View Patent ↗This invention discloses an insulated gate bipolar transistor (IGBT) device formed in a semiconductor substrate. The IGBT device has a split-shielded trench gate that includes an upper gate segment and a lower shield segment. The IGBT device may further include a dummy trench filled with a dielectric layer disposed at a distance away from the split-shielded trench gate. The IGBT device further includes a body region extended between the split-shielded trench gate and the dummy trench encompassing a source region surrounding the split-shielded trench gate near a top surface of the semiconductor substrate. The IGBT device further includes a heavily doped N region disposed below the body region and above a source-dopant drift region above a bottom body-dopant collector region at a bottom surface of the semiconductor substrate. In an alternative embodiment, the IGBT may include a planar gate with a trench shield electrode.
1. An insulated gate bipolar transistor (IGBT) device in a semiconductor material comprising:
a semiconductor substrate comprising a lower semiconductor layer having a second conductivity type, and an upper semiconductor layer having a first conductivity type;
a body region having a second conductivity type located at the top of the semiconductor substrate and a source region having a first conductivity type located at the top of the body region;
a heavily doped layer of the first conductivity type located below the body region and above at least a portion of the upper semiconductor layer, said heavily doped layer having a higher doping concentration than the upper semiconductor layer;
an emitter electrode contacting the source and body regions;
a trench including a shield electrode, said shield electrode being connected to the emitter electrode; and
a planar gate formed over at least a portion of the source and body regions.
2. The IGBT device of claim 1 wherein:
wherein the heavily doped layer and the upper semiconductor layer comprise a base region of the IGBT, and wherein the planar gate is located next to the source region and the body region such that it forms a channel region in the body region from the source region to base region of the IGBT.
3. The IGBT device of claim 1 wherein the source region further comprises
a highly doped source region and a lightly doped source (LDS) region, said LDS being located between the highly doped source region and the planar gate.
4. The IGBT device of claim 1 wherein:
the trench further includes a gate electrode such that the device has a vertical gate component and a horizontal gate component, such that a channel formed from a horizontal gate component is connected to a channel formed from the vertical gate component.
5. The IGBT device of claim 1 further comprising:
a second trench acting as a dummy trench, said dummy trench configured so as to not form a channel adjacent to the trench.
6. The IGBT device of claim 1 wherein:
the device does not include a trench gate electrode.
7. The IGBT of claim 6 further comprising:
a channel region formed by the planar gate, wherein the channel region is not located adjacent to the shield electrode.
8. The IGBT of claim 6 wherein:
the source region is located away from the shield trench.
9. The IGBT of claim 7 wherein:
the shield electrode is recessed away from the channel region.
10. The IGBT of claim 6 wherein:
the shield electrode has the opposite conductivity type as the source region.
11. The IGBT of claim 6 wherein:
the shield trench runs perpendicular to and intersects the planar gate along the top surface of the substrate.
12. The IGBT of claim 11 wherein:
the source and body regions run parallel to the planar gate, and the source region is pulled back from the shield trench.
13. The IGBT of claim 1 wherein:
the IGBT is a vertical device.
14. The IGBT device of claim 1 wherein:
the IGBT has a closed cell layout.