IP Library › Granted Patent US 8,468,507
Granted Patent B2
US 8,468,507 · App. 13/158,226 · Granted Jun 18, 2013

Binding executable code at runtime

Inventors: Amit Kumar Agarwal (Bellevue, WA); Weirong Zhu (Issaquah, WA); Yosseff Levanoni (Redmond, WA)
Assignee: Microsoft Corporation
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Quick Facts
Patent No.
US 8,468,507
App. No.
13/158,226
Granted
Jun 18, 2013
Kind
B2
Abstract

The present invention extends to methods, systems, and computer program products for binding executable code at runtime. Embodiments of the invention include late binding of specified aspects of code to improve execution performance. A runtime dynamically binds lower level code based on runtime information to optimize execution of a higher level algorithm. Aspects of a higher level algorithm having a requisite (e.g., higher) impact on execution performance can be targeted for late binding. Improved performance can be achieved with minimal runtime costs using late binding for aspects having the requisite execution performance impact.

Claims (57)

1. At a computer system, the computer system including a processor and system memory, the computer system also including a compiler and a runtime, the compiler configured to compile statements and expressions of higher level source code into representative lower level instructions of lower level code, the runtime configured to execute executable code, a method for binding code at runtime to improve performance, the method comprising:

an act of accessing statements and expressions of higher level source code;

an act of detecting that the higher level source code includes at least one specified aspect for which the execution efficiency of corresponding representative lower instructions varies to a requisite extent dependent upon the configuration of input data received during execution;

an act of compiling the statements and expressions of the accessed higher level source code into representative lower level instructions of the lower level code, including: an act of compiling a plurality of different representative lower level instructions for the at least one specified aspect comprises: an act of compiling an abstract interface to represent the at least one specified aspect; and an act of compiling a plurality of different portions of lower level code that can be dynamically linked to the abstract interface at runtime, each of the plurality of different representative lower level instructions configured to correctly implement the intent of the at least one specified aspect, at least one of the plurality of different representative lower level instructions being optimized for execution efficiency based on a different configuration of received input data;

an act of configuring execution of the lower level instructions at runtime, including: an act of analyzing the configuration of input data to be provided to the at least one specified aspect of the higher level source code;

an act of determining that specified representative lower level instructions, selected from among the plurality of different representative lower level instructions, are optimized for execution based on the configuration of the provided input data;

and an act of binding the specified lower level instructions to executable code to implement the intent of the at least one specified aspect of the higher level source code.

2. The method as recited in claim 1 , wherein the act of compiling the statements and expressions of the accessed higher level source code into representative lower level instructions of the lower level code comprises an act of compiling C++ code into High Level Shader Language (“HLSL”) bytecode, the C++ code including extensions for parallel environments.

3. The method as recited in claim 2 , wherein the act of compiling a plurality of different representative lower level instructions for the at least one specified aspect comprises an act of compiling a plurality of different versions of a shader for the C++ code, at least one of the plurality of different versions of the shader optimized for a specific configuration of input data.

4. The method as recited in claim 1 , wherein the act of compiling a plurality of different representative lower level instructions for the at least one specified aspect comprises:

an act of compiling one version of representative lower level instructions optimized for use with input data that does not use buffer aliasing at runtime; and

an act of compiling another version of representative lower level instructions for use with input data that does use buffer aliasing at runtime.

5. The method as recited in claim 4 , wherein an act of analyzing the configuration of input data to be provided to the at least one specified aspect of the higher level source code comprises an act of determining that the input data does not use buffer aliasing; and

wherein the act of binding the specified lower level instructions to executable code to implement the intent of the at least one specified aspect of the higher level source code comprises an act of binding the one version of representative lower level instructions to executable code at runtime.

6. The method as recited in claim 4 , wherein the one version of representative lower level instructions and the other version of representative lower level instructions are both High Level Shader Language (“HLSL”) shaders.

7. The method as recited in claim 1 , wherein the act of compiling an abstract interface to represent the at least one specified aspect comprises an act of compiling a physical to logical thread ID mapping interface; and

wherein the act of compiling a plurality of different portions of lower level code that can be dynamically linked to the abstract interface at runtime comprises:

an act of compiling one portion of lower level code for direct physical to logical thread ID mapping; and

an act of compiling another portion of lower level code for the more general indirect physical to logical thread ID mapping.

8. The method as recited in claim 1 , wherein an act of analyzing the configuration of input data to be provided to the at least one aspect of the higher level source code comprises an act of determining that the input data allows using direct physical to logical thread ID mapping; and

wherein the act of binding the specified lower level instructions to executable code to implement the intent of the at least one aspect of the higher level source code comprises an act of dynamically linking the one portion of lower level code to the physical to the logical thread ID mapping interface at runtime.

9. A computer program product for use at a computer system, the computer system including a compiler and a runtime, the compiler configured to compile statements and expressions of higher level source code into representative lower level instructions of lower level code, the runtime configured to execute executable code, the computer program product for a method for binding code at runtime to improve performance, the computer program product for comprising one or more computer storage devices having stored thereon computer-executable instructions that, when executed at a processor, cause the computer system to perform the method including the following:

access statements and expressions of higher level source code;

detect that the higher level source code includes at least one specified aspect for which the execution efficiency of corresponding representative lower instructions varies to a requisite extent dependent upon the configuration of input data received during execution;

compile the statements and expressions of the accessed higher level source code into representative lower level instructions of the lower level code, including: compile a plurality of different representative lower level instructions for the at least one specified aspect comprises: an act of compiling an abstract interface to represent the at least one specified aspect; and an act of compiling a plurality of different portions of lower level code that can be dynamically linked to the abstract interface at runtime, each of the plurality of different representative lower level instructions configured to correctly implement the intent of the at least one specified aspect, each of the plurality of different representative lower level instructions being optimized for execution efficiency based on a different configuration of received input data;

configure execution of the lower level instructions at runtime, including: analyze the configuration of input data to be provided to the at least one specified aspect of the higher level source code;

determine that specified representative lower level instructions, selected from among the plurality of different representative lower level instructions, are optimized for execution based on the configuration of the provided input data;

and bind the specified lower level instructions to executable code to implement the intent of the at least one specified aspect of the higher level source code.

10. The computer program product as recited in claim 9 , wherein computer-executable instructions that, when executed, cause the computer system to compile the statements and expressions of the accessed higher level source code into representative lower level instructions of the lower level code comprise computer-executable instructions that, when executed, cause the computer system to compile C++ code into High Level Shader Language (“HLSL”) bytecode, the C++ code including extensions for parallel environments.

11. The computer program product as recited in claim 10 , wherein computer-executable instructions that, when executed, cause the computer system to compile a plurality of different representative lower level instructions for the at least one specified aspect comprise computer-executable instructions that, when executed, cause the computer system to compile a plurality of different versions of a shader for the C++ code, at least one of the plurality of different versions of the shader optimized for a specific configuration of input data.

12. The computer program product as recited in claim 9 , wherein computer-executable instructions that, when executed, cause the computer system to compile a plurality of different representative lower level instructions for the at least one specified aspect comprise computer-executable instructions that, when executed, cause the computer system to:

compile one version of representative lower level instructions optimized for use with input data that does not use buffer aliasing at runtime; and

compile another version of representative lower level instructions for use with input data that does use buffer aliasing at runtime.

13. The computer program product as recited in claim 12 , wherein computer-executable instructions that, when executed, cause the computer system to analyze the configuration of input data to be provided to the at least one specified aspect of the higher level source code comprise computer-executable instructions that, when executed, cause the computer system to determine that the input data does not use buffer aliasing; and

wherein computer-executable instructions that, when executed, cause the computer system to bind the specified lower level instructions to executable code to implement the intent of the at least one specified aspect of the higher level source code comprise computer-executable instructions that, when executed, cause the computer system to bind the one version of representative lower level instructions to executable code at runtime.

14. The computer program product as recited in claim 12 , wherein the one version of representative lower level instructions and the other version of representative lower level instructions are both High Level Shader Language (“HLSL”) shaders.

15. The computer program product as recited in claim 9 , wherein computer-executable instructions that, when executed, cause the computer system to compile a plurality of different representative lower level instructions for the at least one specified aspect comprise computer-executable instructions that, when executed, cause the computer system to:

compile an abstract interface to represent the at least one specified aspect; and

compile a plurality of different portions of lower level code that can be dynamically linked to the abstract interface at runtime.

16. The computer program product as recited in claim 15 , wherein computer-executable instructions that, when executed, cause the computer system to compile an abstract interface to represent the at least one specified aspect comprise computer-executable instructions that, when executed, cause the computer system to compile a physical to logical thread ID mapping interface; and

wherein computer-executable instructions that, when executed, cause the computer system to compile a plurality of different portions of lower level code that can be dynamically linked to the abstract interface at runtime comprise computer-executable instructions that, when executed, cause the computer system to:

compile one portion of lower level code for direct physical to logical thread ID mapping; and

compile another portion of lower level code for the more general indirect physical to logical thread ID mapping.

17. The computer program product as recited in claim 15 , wherein computer-executable instructions that, when executed, cause the computer system to analyze the configuration of input data to be provided to the at least one aspect of the higher level source code comprise computer-executable instructions that, when executed, cause the computer system to determine that the input data using direct physical to logical thread ID mapping; and

wherein computer-executable instructions that, when executed, cause the computer system to bind the specified lower level instructions to executable code to implement the intent of the at least one aspect of the higher level source code comprises computer-executable instructions that, when executed, cause the computer system to dynamically link the one portion of lower level code to the physical to the logical thread ID mapping interface at runtime.

18. A computer system, the computer system comprising:

one or more processors;

system memory; and

one or more computer storage devices having stored there one computer-executable instructions representing a code analyzer, a compiler, and a runtime, wherein the code analyzer is configured to: access statements and expressions of higher level source code;

detect that the higher level source code includes at least one specified aspect that varies to a requisite extent dependent upon the runtime configuration during execution; and

indicate the identified at least one aspect to the compiler; wherein the compiler is configured to: receiving the indication of the identified at least one aspect;

access the statements and expressions of the higher level code; and

compile the statements and expressions of the accessed higher level source code into representative lower level instructions of the lower level code, including: compiling a plurality of different representative lower level instructions for the at least one specified aspect comprises: an act of compiling an abstract interface to represent the at least one specified aspect; and an act of compiling a plurality of different portions of lower level code that can be dynamically linked to the abstract interface at runtime, each of the plurality of different representative lower level instructions configured to correctly implement the intent of the at least one specified aspect, each of the plurality of different representative lower level instructions configured for execution on a different runtime configuration; and

wherein the runtime is configured to: analyze the runtime configuration to be utilized during execution;

determine that specified representative lower level instructions, selected from among the plurality of different representative lower level instructions, are configured for execution based on the provided runtime configuration; and

bind the specified lower level instructions to executable code to implement the intent of the at least one specified aspect of the higher level source code.

19. The computer system as recited in claim 18 , wherein the statements and expressions are statements and expression of C++ extended for parallel environments and wherein the plurality of different representative lower level instructions are High Level Shader Language (“HLSL”) instructions.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2014
From: MICROSOFT CORPORATION
To: MICROSOFT TECHNOLOGY LICENSING, LLC
Reel/Frame 034544/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2011
From: AGARWAL, AMIT KUMAR; ZHU, WEIRONG; LEVANONI, YOSSEFF
To: MICROSOFT CORPORATION
Reel/Frame 026428/0915 →
Continuity (1)
Related Publication 20120317558A1 · Dec 13, 2012