IP Library Granted Patent US 8,473,660
Granted Patent B2
US 8,473,660 · App. 13/424,280 · Granted Jun 25, 2013

Method and apparatus for arbitration on a data bus

Inventor: Michael D. Johas Teener (Santa Cruz, CA)
Assignee: Apple Inc.
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Quick Facts
Patent No.
US 8,473,660
App. No.
13/424,280
Granted
Jun 25, 2013
Kind
B2
Abstract

A method and apparatus for arbitrating on a high performance serial bus is disclosed. The invention provides for a plurality of arbitration phases and an arbitration advancing means.

Claims (35)

1. A method for requesting bus arbitration in a network comprising a bus, a master node, and one or more non-master nodes, a bus cycle comprising an isochronous phase and an asynchronous phase, said method comprising:

determining whether a non-master node of the one or more non-master nodes wants to arbitrate in the isochronous phase;

when the non-master node wants to arbitrate in the isochronous phase, issuing an isochronous request to arbitrate, the isochronous phase comprising a period of time where isochronous requests are serviced before asynchronous requests; and

when the non-master node does not want to arbitrate in the isochronous phase, issue an isochronous non-arbitration request.

2. The method of claim 1 , wherein the isochronous request to arbitrate is for a next state within the isochronous phase.

3. The method of claim 2 , where the isochronous request to arbitrate comprises an isochronous even request, and wherein the next state is an even state and a current state is an odd state.

4. The method of claim 1 , wherein issuing the isochronous request to arbitrate comprises sending the isochronous request to arbitrate to the master node.

5. The method of claim 4 , wherein the master node comprises a Bus Owner/Supervisor/Selector (BOSS) node.

6. The method of claim 5 , wherein the BOSS node advances a phase between the isochronous phase and the asynchronous phase.

7. The method of claim 5 , wherein the BOSS node advances a state within the isochronous phase from an odd state to an even state.

8. A non-master node apparatus on a network, the non-master node apparatus comprising:

at least one network interface, the at least one network interface configured for operation within a bus cycle comprising:

an asynchronous phase; and

an isochronous phase, the isochronous phase comprising a period of time where isochronous requests are serviced before asynchronous requests and a plurality of states;

a processor; and

a non-transitory computer readable apparatus comprising a storage medium storing at least one computer program, the at least one computer program comprising a plurality of instructions which, when executed by the processor, cause the processor to:

determine whether the non-master node apparatus wants to arbitrate in a next isochronous phase;

when the non-master node apparatus wants to arbitrate in the next isochronous phase, issue an isochronous request to arbitrate in a next state of the plurality of states in the isochronous phase; and

when the non-master node apparatus does not want to arbitrate in the next isochronous phase, issue an isochronous non-arbitration request.

9. The non-master node apparatus of claim 8 , wherein the at least one network interface is configured to communicate with a master node, the master node advances from the isochronous phase to the asynchronous phase.

10. The non-master node apparatus of claim 9 , wherein the master node comprises a Bus Owner/Supervisor/Selector (BOSS) node.

11. The non-master node apparatus of claim 9 , wherein the computer program comprises further instructions, when executed on the processor, when the non-master node apparatus wants to arbitrate in the isochronous phase, send the isochronous request to arbitrate in the next state to the BOSS node.

12. The non-master node apparatus of claim 9 , wherein the master node services all isochronous requests before the master node services any asynchronous requests.

13. A non-master node apparatus on a network, the non-master node apparatus comprising:

a first logic configured to communicate on the network, the network having a bus cycle comprising an isochronous state, the isochronous state comprising an even phase and an odd phase;

a second logic configured to determine whether the non-master node apparatus wants to arbitrate;

a third logic configured to, when the non-master node apparatus wants to arbitrate, issue an isochronous request to arbitrate in a next state of the isochronous phase; and

a fourth logic configured to, when the non-master node apparatus does not want to arbitrate, issue an isochronous non-arbitration request.

14. The non-master node apparatus of claim 13 , wherein the first logic is further configured to communicate with a master node.

15. The non-master node apparatus of claim 14 , wherein the master node comprises a Bus Owner/Supervisor/Selector (BOSS) node.

16. The non-master node apparatus of claim 15 , wherein the third logic is further configured to send the isochronous request to arbitrate to the BOSS node.

17. The non-master node apparatus of claim 15 , wherein the fourth logic is further configured to send the isochronous non-arbitration request to the BOSS node.

18. The non-master node apparatus of claim 13 , wherein the bus cycle of the network further comprises an asynchronous state, the asynchronous state occurring after the isochronous state.

19. The non-master node apparatus of claim 18 , wherein a master node advances a state from the isochronous state to the asynchronous state.

20. The non-master node apparatus of claim 18 , wherein the isochronous request to arbitrate is prioritized over asynchronous requests to arbitrate.

Continuity (5)
Continuation 12690019 · Jan 19, 2010
Continuation 11021391 · Dec 21, 2004
Continuation 10464270 · Jun 17, 2003
Continuation 09435134 · Nov 5, 1999
Related Publication 20120179850A1 · Jul 12, 2012