IP Library › Granted Patent US 8,473,823
Granted Patent B2
US 8,473,823 · App. 12/674,896 · Granted Jun 25, 2013

Encoding device and decoding device

Inventors: Shutai Okamura (Osaka, JP); Yutaka Murakami (Osaka, JP); Masayuki Orihashi (Kanagawa, JP)
Assignee: Panasonic Corporation
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Quick Facts
Patent No.
US 8,473,823
App. No.
12/674,896
Granted
Jun 25, 2013
Kind
B2
Abstract

An encoding device and decoding device for improving an error floor while taking advantage of the features of a convolutional code capable of encoding/decoding an information sequence with an arbitrary length are disclosed. An error correction encoding section is provided with an LDPC-CC encoder and an LDPC-BC encoder. The LDPC-CC encoder acquires an LDPC-CC code word sequence by applying LDPC-CC encoding to a transmission information sequence. The LDPC-BC encoder acquires a parity sequence by applying LDPC-BC encoding to the LDPC-CC code word sequence. The LDPC-CC encoder further applies the LDPC-CC encoding to the parity sequence.

Claims (50)

1. A coding apparatus comprising:

a convolutional encoder that acquires a convolutional codeword sequence by performing convolutional coding of an input sequence; and

a block encoder that acquires a parity sequence by performing block coding of the convolutional codeword sequence and outputs the parity sequence to the convolutional encoder, wherein:

the convolutional encoder acquires a low density parity check convolutional code codeword sequence as the convolutional codeword sequence by performing low density parity check convolutional code coding of the input sequence; and

the block encoder acquires a parity sequence by performing low density parity cheek block code coding of the low density parity check convolutional code codeword sequence and outputs the parity sequence to the convolutional encoder.

2. The coding apparatus according to claim 1 , wherein:

the block encoder comprises an outputter that accumulates in parallel parity bits acquired by the low density parity check block code coding, converts the parity bits accumulated in parallel into serial and outputs the converted parity bits as the parity sequence; and

the outputter switches between a timing of accumulating the parity bits and a timing of outputting in serial the parity bits accumulated, based on a sequence length of the low density parity check convolutional code codeword sequence received as input in the block encoder.

3. The coding apparatus according to claim 2 , wherein the timing of accumulating the parity bits is a timing of outputting the low density parity check convolutional code codeword sequence from the convolutional encoder to the block encoder when the input sequence is a transmission information sequence.

4. The coding apparatus according to claim 2 , wherein the timing of converting the parity bits into serial and outputting the converted parity bits is a timing the low density parity check convolutional code codeword sequence has been outputted from the convolutional encoder to the block encoder when the input sequence is a transmission information sequence.

5. The coding apparatus according to claim 1 , wherein the block encoder performs the low density parity check block code coding using a low density generation matrix.

6. The coding apparatus according to claim 1 , wherein the block encoder performs the low density parity check block code coding using a repeat accumulate code.

7. The coding apparatus according to claim 1 , wherein, using a structural low density parity check block code as the low density parity check block code, the block encoder sets a number of columns of a constituent identity matrix forming the structural low density parity check block code, equal to or greater than a memory length of a low density parity check convolutional code.

8. The coding apparatus according to claim 1 , wherein the block encoder performs the low density parity check block code coding, using a generation matrix acquired from a parity check matrix of a low density parity check block code.

9. A decoding apparatus comprising:

a convolutional decoder that acquires a low density parity check convolutional code decoding sequence by performing low density parity check convolutional code decoding of an input sequence; and

a block decoder that performs low density parity check block code decoding of the low density parity check convolutional code decoding sequence, wherein:

the convolutional decoder acquires a soft decision value after the low density parity check convolutional code decoding, by performing the low density parity check convolutional code decoding of a reception log-likelihood ratio sequence of the input sequence; and

the block decoder performs the low density parity check block code decoding, using the soft decision value after the low density parity check convolutional code decoding.

10. A decoding apparatus comprising:

a convolutional decoder that acquires a low density parity check convolutional code decoding sequence by performing low density parity check convolutional code decoding of an input sequence; and

a block decoder that performs low density parity check block code decoding of the low density parity check convolutional code decoding sequence, wherein:

the convolutional decoder further comprises a hard decider that acquires a soft decision value after low density parity check convolutional code decoding by performing the low density parity check convolutional code decoding of the input sequence and acquires a hard decision value by performing hard decision of the soft decision value after the low density parity check convolutional code decoding; and

the block decoder performs the low density parity check block code decoding using the hard decision value.

11. A decoding apparatus comprising:

a convolutional decoder that acquires a low density parity check convolutional code decoding sequence by performing low density parity check convolutional code decoding of an input sequence; and

a block decoder that performs low density parity check block code decoding of the low density parity check convolutional code decoding sequence, wherein:

the convolutional decoder comprises an error detector that acquires a soft decision value by performing the low density parity check convolutional code decoding of the soft decision value after the low density parity check convolutional code decoding of a reception log-likelihood ratio sequence of the input sequence, acquires a reception codeword sequence by performing hard decision of the soft decision value, performs error detection of the reception codeword sequence per memory length in a low density parity check convolutional code parity check matrix used for the low density parity check convolutional code decoding, and assigns an error label to the reception codeword sequence based on an error detection result; and

the block decoder performs erasure correction decoding of the reception codeword sequence per the memory length, based on the error label.

12. A decoding apparatus comprising:

a convolutional decoder that acquires a low density parity check convolutional code decoding sequence by performing low density parity check convolutional code decoding of an input sequence; and

a block decoder that performs low density parity check block code decoding of the low density parity check convolutional code decoding sequence, wherein:

the convolutional decoder acquires a soft decision value by performing the low density parity check convolutional code decoding of a reception log-likelihood ratio sequence of the input sequence;

the block decoder acquires a soft decision value by performing the low density parity check block code decoding using the soft decision value; and

the convolutional decoder performs the low density parity check convolutional code decoding, using the soft decision value acquired in the block decoder as an a priori value.

13. A non-transitory computer-readable storage medium with an executable coding program stored thereon, wherein the coding program instructs a processor to perform:

acquiring a convolutional codeword sequence by performing convolutional coding of an input sequence; and

acquiring a parity sequence by performing block coding of the convolutional codeword sequence and outputs the parity sequence, wherein:

the acquiring the convolutional codeword sequence includes acquiring a low density parity check convolutional code codeword sequence as the convolutional codeword sequence by performing low density parity check convolutional code coding of the input sequence; and

the acquiring the parity sequence includes acquiring the parity sequence by performing low density parity check block code coding of the low density parity check convolutional code codeword sequence and outputs the parity sequence.

14. A non-transitory computer-readable storage medium with an executable decoding program stored thereon, wherein the decoding program instructs a processor to perform:

acquiring a low density parity check convolutional code decoding sequence by performing low density parity cheek convolutional code decoding of an input sequence; and

performing low density parity check block code decoding of the low density parity check convolutional code decoding sequence, wherein:

the acquiring includes acquiring a soft decision value after the low density parity check convolutional code decoding, by performing the low density parity check convolutional code decoding of a reception log-likelihood ratio sequence of the input sequence; and

the performing includes performing the low density parity check block code decoding, using the soft decision value after the low density parity check convolutional code decoding.

15. A non-transitory computer-readable storage medium with an executable decoding program stored thereon, wherein the decoding program instructs a processor to perform:

acquiring a low density parity check convolutional code decoding sequence by performing low density parity check convolutional code decoding of an input sequence; and

performing low density parity check block code decoding of the low density parity check convolutional code decoding sequence, wherein:

the acquiring further includes acquiring a soft decision value after low density parity check convolutional code decoding by performing the low density parity check convolutional code decoding of the input sequence and acquiring a hard decision value by performing hard decision of the soft decision value after the low density parity check convolutional code decoding; and

the performing includes performing the low density parity check block code decoding using the hard decision value.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2014
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
Reel/Frame 033033/0163 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2010
From: OKAMURA, SHUTAI; MURAKAMI, YUTAKA; ORIHASHI, MASAYUKI
To: PANASONIC CORPORATION
Reel/Frame 024243/0279 →
Priority Claims (2)
JP 2007-224622 · Aug 30, 2007 · national
JP 2008-219825 · Aug 28, 2008 · national
Continuity (1)
Related Publication 20110138258A1 · Jun 9, 2011