Method for manufacturing a semiconductor device with impurity doped oxide semiconductor
It is an object to provide a semiconductor device including an oxide semiconductor, in which miniaturization of a transistor is achieved and the concentration of an electric field is relieved. The width of a gate electrode is reduced and a space between a source electrode layer and a drain electrode layer is shortened. By adding a rare gas in a self-alignment manner with the use of a gate electrode as a mask, a low-resistance region in contact with a channel formation region can be provided in an oxide semiconductor layer. Accordingly, even when the width of the gate electrode, that is, the line width of a gate wiring is small, the low-resistance region can be provided with high positional accuracy, so that miniaturization of a transistor can be realized.
1. A method for manufacturing a semiconductor device, comprising the steps of:
forming an oxide semiconductor layer over an insulating surface;
forming a source electrode layer and a drain electrode layer over and partly in contact with the oxide semiconductor layer;
forming an insulating layer over and in contact with the oxide semiconductor layer, the source electrode layer, and the drain electrode layer;
forming a gate electrode over the insulating layer and overlapping with the oxide semiconductor layer; and
adding an impurity element to a part of the oxide semiconductor layer in a self-alignment manner with the use of the gate electrode, the source electrode layer and the drain electrode layer as a mask through the insulating layer,
wherein the impurity element is a rare gas.
2. The method for manufacturing a semiconductor device, according to claim 1 , further comprising the step of forming a base insulating layer in contact with the oxide semiconductor layer by a sputtering method.
3. The method for manufacturing a semiconductor device, according to claim 1 , wherein the oxide semiconductor layer is subjected to heat treatment at more than or equal to 400° C. before the impurity element is added.
4. The method for manufacturing a semiconductor device, according to claim 1 , wherein the impurity element is added by an ion implantation apparatus.
5. The method for manufacturing a semiconductor device, according to claim 1 , wherein the impurity element is added by an ion doping apparatus.
6. A method for manufacturing a semiconductor device, comprising the steps of:
forming a source electrode layer and a drain electrode layer over an insulating surface;
forming an oxide semiconductor layer over and partly in contact with the source electrode layer and the drain electrode layer;
forming an insulating layer over and in contact with the oxide semiconductor layer, the source electrode layer, and the drain electrode layer;
forming a gate electrode over and in contact with the insulating layer; and
adding an impurity element to a part of the oxide semiconductor layer in a self-alignment manner with the use of the gate electrode as a mask through the insulating layer,
wherein the gate electrode overlaps with the oxide semiconductor layer, and
wherein the impurity element is a rare gas.
7. The method for manufacturing a semiconductor device, according to claim 6 , further comprising the step of forming a base insulating layer in contact with the oxide semiconductor layer by a sputtering method.
8. The method for manufacturing a semiconductor device, according to claim 6 , wherein the oxide semiconductor layer is subjected to heat treatment at more than or equal to 400° C. before the impurity element is added.
9. The method for manufacturing a semiconductor device, according to claim 6 , wherein the impurity element is added by an ion implantation apparatus.
10. The method for manufacturing a semiconductor device, according to claim 6 , wherein the impurity element is added by an ion doping apparatus.
11. A method for manufacturing a semiconductor device, comprising the steps of:
forming an oxide semiconductor layer over an insulating surface;
forming a source electrode layer and a drain electrode layer over and partly in contact with the oxide semiconductor layer;
forming an insulating layer over and in contact with the oxide semiconductor layer, the source electrode layer, and the drain electrode layer;
forming a gate electrode over the insulating layer and overlapping with the oxide semiconductor layer;
etching the insulating layer selectively so that a part of the oxide semiconductor layer is exposed; and
adding an impurity element to the exposed part of the oxide semiconductor layer.
12. The method for manufacturing a semiconductor device, according to claim 11 , further comprising the step of forming a base insulating layer in contact with the oxide semiconductor layer by a sputtering method.
13. The method for manufacturing a semiconductor device, according to claim 11 , wherein the oxide semiconductor layer is subjected to heat treatment at more than or equal to 400° C. before the impurity element is added.
14. The method for manufacturing a semiconductor device, according to claim 11 , wherein the impurity element is a rare gas.
15. The method for manufacturing a semiconductor device, according to claim 11 , wherein the impurity element is added by an ion implantation apparatus.
16. The method for manufacturing a semiconductor device, according to claim 11 , wherein the impurity element is added by an ion doping apparatus.
17. The method for manufacturing a semiconductor device, according to claim 11 , wherein the impurity element is added by a plasma treatment apparatus.
18. The method for manufacturing a semiconductor device, according to claim 11 , wherein the impurity element is added by an ICP type etching apparatus.