Semiconductor device and method of manufacturing the same
A semiconductor device including: a substrate; an insulating film formed over the substrate; a copper interconnect, having a plurality of hillocks formed over the surface thereof, buried in the insulating film; a first insulating interlayer formed over the insulating film and the copper interconnect; a second insulating interlayer formed over the first insulating interlayer; and an electroconductive layer formed over the second insulating interlayer, wherein the top surface of at least one hillock highest of all hillocks is brought into contact with the lower surface of the second insulating interlayer is provided.
1. A method of manufacturing a semiconductor device comprising:
forming a copper interconnect by filling a recess provided to an insulating film formed over a substrate with a copper-containing electroconductive material, and by removing a portion of said electroconductive material exposed out from said recess by chemical mechanical polishing;
annealing the entire portion of said substrate;
forming a first insulating interlayer over said insulating film and said copper interconnect;
planarizing the surface of said first insulating interlayer;
forming a second insulating interlayer over said first insulating interlayer; and
forming an electroconductive layer over said second insulating interlayer,
wherein, in said annealing, a plurality of hillocks are formed on the surface of said copper interconnect, and
in said planarizing the surface of said first insulating interlayer, said first insulating interlayer being planarized until at least one hillock is exposed to the surface of said first insulating interlayer.
2. The method of manufacturing a semiconductor device as claimed in claim 1 , further comprising:
forming a diffusion barrier film over said insulating film and said copper interconnect, after said annealing and before said forming said first insulating interlayer,
wherein said first insulating interlayer is formed over said insulating film and said copper interconnect, while placing said diffusion barrier film in between.
3. The method of manufacturing a semiconductor device as claimed in claim 2 ,
wherein, in said forming said diffusion barrier film, said diffusion barrier film is formed so as to cover the side faces and top surfaces of said plurality of hillocks formed over the surface of said copper interconnect.
4. The method of manufacturing a semiconductor device as claimed in claim 1 , further comprising:
modifying the surface of said first insulating interlayer, after said planarizing the surface of said first insulating interlayer, and after this process, said second insulating interlayer is formed.
5. The method of manufacturing a semiconductor device as claimed in claim 4 ,
wherein in said modifying the surface of said first insulating interlayer, said first insulating interlayer is modified by plasma irradiation onto the surface thereof, under a He gas, N 2 gas, or ammonia gas atmosphere.
6. The method of manufacturing a semiconductor device as claimed in claim 1 ,
wherein, in said forming said second insulating interlayer, said second insulating interlayer is formed using a Si-containing gas, and a Si—Cu alloy film is formed over the surface of said hillocks exposed onto the surface of said first insulating interlayer.
7. The method of manufacturing a semiconductor device as claimed in claim 1 ,
wherein, in said forming said electroconductive layer over said second insulating interlayer, a lower electrode of a capacitor element is formed as said electroconductive layer, and
after this process, a capacitor film and an upper electrode are stacked in this order over said lower electrode, to thereby form said capacitor element.
8. The method of manufacturing a semiconductor device as claimed in claim 1 , further comprising:
forming a diffusion barrier film over said insulating film and said copper interconnect, after said annealing and before said forming said first insulating interlayer, said diffusion barrier film being formed so as to cover the side faces and top surfaces of said plurality of hillocks formed over the surface of said copper interconnect, and said first insulating interlayer being formed over said insulating film and said copper interconnect, while placing said diffusion barrier film in between, and
modifying the surface of said first insulating interlayer, after said planarizing the surface of said first insulating interlayer, and after this process, said second insulating interlayer is formed, said first insulating interlayer being modified by plasma irradiation onto the surface thereof, under a He gas, N 2 gas, or ammonia gas atmosphere,
wherein, in said forming said second insulating interlayer, said second insulating interlayer is formed using a Si-containing gas, and a Si—Cu alloy film is formed over the surface of said hillocks exposed onto the surface of said first insulating interlayer and
wherein, in said forming said electroconductive layer over said second insulating interlayer, a lower electrode of a capacitor element is formed as said electroconductive layer, and
after this process, a capacitor film and an upper electrode are stacked in this order over said lower electrode, to thereby form said capacitor element.