IP Library › Granted Patent US 8,488,299
Granted Patent B2
US 8,488,299 · App. 12/841,456 · Granted Jul 16, 2013

Capacitor structure

Inventors: Shih-Hsien Wu (Taoyuan County, TW); Min-Lin Lee (Hsinchu, TW); Shinn-Juh Lai (Hsinchu County, TW); Shur-Fen Liu (Hsinchu County, TW); Meng-Hua Chen (Kaohsiung County, TW); Chin-Hsien Hung (Taichung County, TW)
Assignee: Industrial Technology Research Institute
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Quick Facts
Patent No.
US 8,488,299
App. No.
12/841,456
Granted
Jul 16, 2013
Kind
B2
Abstract

The disclosure provides a capacitor structure. A first dielectric layer is disposed over the first electrode layer. A second electrode layer is disposed over the first dielectric layer. At least one of the first electrode layer and the second electrode layer has a peak-valley like structure to create at least two different gap distances therebetween, thereby providing parallel combinations of at least two different capacitances.

Claims (31)

1. A capacitor structure, comprising:

a first electrode layer having a peak-valley like structure, the peak-valley like structure of the first electrode layer having at least one first convex portion and at least one first concave portion;

a first dielectric layer disposed over the first electrode layer, wherein the first dielectric layer has a uniform thickness between 0.1 μm and 10 μm;

a second electrode layer having a peak-valley like structure disposed over the first dielectric layer, the peak-valley like structure of the second electrode layer having at least one second convex portion and at least one second concave portion, the at least one second concave portion inserted in the at least one first concave portion, the at least one first convex portion inserted in the at least one second convex portion;

a second dielectric layer disposed over the second electrode layer; and

a third electrode layer disposed over the second dielectric layer,

wherein at least two gaps are formed between the peak-valley structure of the second electrode layer and the third electrode layer, thereby providing parallel combinations of at least two different capacitances.

2. The capacitor structure as claimed in claim 1 , wherein the third electrode layer is a flat electrode.

3. The capacitor structure as claimed in claim 1 , wherein the third electrode layer has a peak-valley like structure.

4. The capacitor structure as claimed in claim 1 , further comprising:

a third dielectric layer disposed over the third electrode layer; and

a fourth electrode layer disposed over the third dielectric layer.

5. The capacitor structure as claimed in claim 4 , wherein the fourth electrode layer is a flat electrode.

6. The capacitor structure as claimed in claim 4 , wherein the fourth electrode layer has a peak-valley like structure.

7. The capacitor structure as claimed in claim 1 , further comprising at least one via connecting the capacitor structure to one other capacitor structure by series connection or parallel connection.

8. The capacitor structure as claimed in claim 1 is used in a PCB.

9. The capacitor structure as claimed in claim 1 , wherein each of the first and second concave portions has a flat bottom.

10. The capacitor structure as claimed in claim 1 , wherein the first dielectric layer is epoxy resin, polyimide, ABF (Ajinomoto build-up film), BT (Bismaleimide Triacine) or combinations thereof.

11. A capacitor structure, comprising:

a first electrode layer having a peak-valley like structure, the peak-valley like structure of the first electrode layer having at least one first convex portion and at least one first concave portion;

a first dielectric layer disposed over the first electrode layer, wherein the first dielectric layer has a uniform thickness between 0.1 μm and 10 μm;

a second electrode layer having a peak-valley like structure disposed over the first dielectric layer, the peak-valley like structure of the second electrode layer having at least one second convex portion and at least one second concave portion, the at least one second concave portion inserted in the at least one first concave portion, and the at least one first convex portion inserted in the at least one second convex portion;

a second dielectric layer disposed over the second electrode layer;

a third electrode layer disposed over the second dielectric layer;

a first via passing through the second dielectric layer and connected to the at least one second convex portion of the second electrode layer;

another first via passing through the second dielectric layer, the second electrode layer and the first dielectric layer, connected to the at least one first convex portion of the first electrode layer and not connected to the second electrode layer; and

two second vias passing through the second and the first dielectric layers and not connected to the first electrode layer and the second electrode layer for transmitting a signal;

wherein at least two gaps are formed between the peak-valley structure of the second electrode layer and the third electrode layer, thereby providing parallel combinations of at least two different capacitances, and

wherein the at least one second convex portions of the second electrode layer and the first electrode layer are connected to a power and a ground with the first via and the another first via, respectively.

12. The capacitor structure as claimed in claim 11 is used in a PCB.

13. The capacitor structure as claimed in claim 11 , wherein the first dielectric layer is epoxy resin, polyimide, ABF (Ajinomoto build-up film), BT (Bismaleimide Triacine) or combinations thereof.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2010
From: WU, SHIH-HSIEN; LEE, MIN-LIN; LAI, SHINN-JUH; LIU, SHUR-FEN; CHEN, MENG-HUA; HUNG, CHIN-HSIEN
To: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
Reel/Frame 024737/0747 →
Priority Claims (1)
TW 98124852 A · Jul 23, 2009 · national
Continuity (1)
Related Publication 20110019335A1 · Jan 27, 2011