IP Library Granted Patent US 8,501,564
Granted Patent B2
US 8,501,564 · App. 12/956,624 · Granted Aug 6, 2013

Semiconductor element, semiconductor device, and method for manufacturing the same

Inventors: Hideomi Suzawa (Kanagawa, JP); Motomu Kurata (Kanagawa, JP); Mayumi Mikami (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 8,501,564
App. No.
12/956,624
Granted
Aug 6, 2013
Kind
B2
Abstract

The semiconductor element includes an oxide semiconductor layer on an insulating surface; a source electrode layer and a drain electrode layer over the oxide semiconductor layer; a gate insulating layer over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer. The source electrode layer and the drain electrode layer have sidewalls which are in contact with a top surface of the oxide semiconductor layer.

Claims (124)

1. A method for manufacturing a semiconductor element, comprising the steps of:

forming a semiconductor layer over an insulating surface;

forming a source electrode layer and a drain electrode layer on the semiconductor layer;

forming a film serving as sidewalls on the semiconductor layer, the source electrode layer, and the drain electrode layer;

forming sidewalls by etching the film serving as the sidewalls, the sidewalls being in direct contact with a side surface of the source electrode layer and a side surface of the drain electrode layer;

forming a gate insulating layer over the semiconductor layer, the source electrode layer, the drain electrode layer, and the sidewalls; and

forming a gate electrode layer over the gate insulating layer so that the gate electrode layer overlaps with the sidewalls at least partly.

2. The method for manufacturing the semiconductor element according to claim 1 , further comprising the steps of:

forming a conductive layer on the insulating surface; and

forming an insulating layer covering the conductive layer,

wherein the conductive layer overlaps with the semiconductor layer with the insulating layer interposed therebetween.

3. The semiconductor element according to claim 1 ,

wherein the sidewalls comprise an insulating material.

4. A method for manufacturing a semiconductor element, comprising the steps of:

forming an oxide semiconductor layer over an insulating surface;

forming a source electrode layer and a drain electrode layer on the oxide semiconductor layer;

forming a film serving as sidewalls on the oxide semiconductor layer, the source electrode layer, and the drain electrode layer;

forming sidewalls by etching the film serving as the sidewalls, the sidewalls being in direct contact with a side surface of the source electrode layer, a side surface of the drain electrode layer, and a top surface of the oxide semiconductor layer;

forming a gate insulating layer over the oxide semiconductor layer, the source electrode layer, the drain electrode layer, and the sidewalls; and

forming a gate electrode layer over the gate insulating layer so that the gate electrode layer overlaps with the sidewalls at least partly.

5. The method for manufacturing the semiconductor element according to claim 4 , further comprising the steps of:

forming a conductive layer on the insulating surface; and

forming an insulating layer covering the conductive layer,

wherein the conductive layer overlaps with the oxide semiconductor layer with the insulating layer interposed therebetween.

6. The semiconductor element according to claim 4 ,

wherein the sidewalls comprise an insulating material.

7. A method for manufacturing a semiconductor element, comprising the steps of:

forming an oxide semiconductor layer over an insulating surface;

forming a first conductive film and a second conductive film on the oxide semiconductor layer;

forming a second source electrode layer and a second drain electrode layer by etching the second conductive film;

forming a film serving as sidewalls on the first conductive film, the second source electrode layer, and the second drain electrode layer;

forming sidewalls by etching the film serving as the sidewalls, the sidewalls being in direct contact with a side surface of the second source electrode layer and a side surface of the second drain electrode layer;

forming a first source electrode layer and a first drain electrode layer by etching the first conductive film using the sidewalls as masks so that the sidewalls are in direct contact with top surfaces of the first source electrode layer and the first drain electrode layer, the first source electrode layer extending beyond an edge of the second source electrode layer, and the first drain electrode layer extending beyond an edge of the second drain electrode layer;

forming a gate insulating layer over the oxide semiconductor layer, the first source electrode layer, the second source electrode layer, the first drain electrode layer, the second drain electrode layer, and the sidewalls; and

forming a gate electrode layer over the gate insulating layer so that the gate electrode layer overlaps with the sidewalls at least partly.

8. The method for manufacturing the semiconductor element according to claim 7 ,

wherein the gate insulating layer and an insulating layer are provided between the gate electrode layer and the second source electrode layer or the second drain electrode layer, and

wherein the second source electrode layer or the second drain electrode layer overlaps with a part of the gate electrode layer with the gate insulating layer and the insulating layer interposed therebetween.

9. The semiconductor element according to claim 7 ,

wherein the sidewalls comprise an insulating material.

10. A semiconductor element comprising:

a semiconductor layer over an insulating surface;

a source electrode layer and a drain electrode layer on the semiconductor layer;

sidewalls provided in direct contact with a side surface of the source electrode layer and a side surface of the drain electrode layer;

a gate insulating layer over the semiconductor layer, the sidewalls, the source electrode layer, and the drain electrode layer; and

a gate electrode layer on the gate insulating layer,

wherein the sidewalls are provided between the gate insulating layer and the source electrode layer and the drain electrode layer, and

wherein the sidewalls and the gate electrode layer overlap at least partly with each other.

11. The semiconductor element according to claim 10 , further comprising:

a conductive layer on the insulating surface; and

an insulating layer covering the conductive layer,

wherein the conductive layer overlaps with the semiconductor layer with the insulating layer interposed therebetween.

12. The semiconductor element according to claim 10 ,

wherein the gate insulating layer and an insulating layer are provided between the gate electrode layer and the source electrode layer or the drain electrode layer, and

wherein the source electrode layer or the drain electrode layer overlaps with a part of the gate electrode layer with the gate insulating layer and the insulating layer interposed therebetween.

13. The semiconductor element according to claim 10 ,

wherein the sidewalls comprise an insulating material.

14. A semiconductor device comprising the semiconductor element according to claim 10 ,

wherein the semiconductor device is an electronic device selected from the group consisting of a laptop personal computer, a portable information terminal, an e-book reader, a mobile phone, and a digital camera.

15. The semiconductor element according to claim 10 ,

wherein the semiconductor layer is an oxide semiconductor layer.

16. A semiconductor element comprising:

an oxide semiconductor layer over an insulating surface;

a source electrode layer and a drain electrode layer on the oxide semiconductor layer;

sidewalls provided in direct contact with a side surface of the source electrode layer and a side surface of the drain electrode layer;

a gate insulating layer over the oxide semiconductor layer, the sidewalls, the source electrode layer, and the drain electrode layer; and

a gate electrode layer on the gate insulating layer,

wherein the sidewalls are provided between the gate insulating layer and the source electrode layer and the drain electrode layer,

wherein the sidewalls and the gate electrode layer overlap at least partly with each other, and

wherein the sidewalls are in direct contact with a top surface of the oxide semiconductor layer.

17. The semiconductor element according to claim 16 , further comprising:

a conductive layer on the insulating surface; and

an insulating layer covering the conductive layer,

wherein the conductive layer overlaps with the oxide semiconductor layer with the insulating layer interposed therebetween.

18. The semiconductor element according to claim 16 ,

wherein the sidewalls comprise an insulating material.

19. A semiconductor device comprising the semiconductor element according to claim 16 ,

wherein the semiconductor device is an electronic device selected from the group consisting of a laptop personal computer, a portable information terminal, an e-book reader, a mobile phone, and a digital camera.

20. The semiconductor element according to claim 16 , wherein a carrier concentration in the oxide semiconductor layer is lower than 1×10 12 /cm 3 .

21. The semiconductor element according to claim 16 , wherein an off-state current of the semiconductor element is less than 1×10 −13 A.

22. A semiconductor element comprising:

an oxide semiconductor layer over an insulating surface;

a source electrode layer and a drain electrode layer on the oxide semiconductor layer,

wherein the source electrode layer comprising:

a first source electrode layer; and

a second source electrode layer on the first source electrode layer,

wherein the drain electrode layer comprising:

a first drain electrode layer; and

a second drain electrode layer on the first drain electrode layer,

a first sidewall provided in direct contact with a side surface of the second source electrode layer and a top surface of the first source electrode layer,

a second sidewall provided in direct contact with a side surface of the second drain electrode layer and a top surface of the first drain electrode layer,

a gate insulating layer over the oxide semiconductor layer, the first sidewall, the second sidewall, the source electrode layer, and the drain electrode layer; and

a gate electrode layer on the gate insulating layer,

wherein the first sidewall and the second sidewall are provided between the gate insulating layer and the source electrode layer and the drain electrode layer,

wherein the first sidewall and the gate electrode layer overlap at least partly with each other,

wherein the second sidewall and the gate electrode layer overlap at least partly with each other,

wherein the first source electrode layer extends beyond an edge of the second source electrode layer, and

wherein the first drain electrode layer extends beyond an edge of the second drain electrode layer.

23. The semiconductor element according to claim 22 ,

wherein the gate insulating layer and an insulating layer are provided between the gate electrode layer and the source electrode layer or the drain electrode layer, and

wherein the source electrode layer or the drain electrode layer overlaps with a part of the gate electrode layer with the gate insulating layer and the insulating layer interposed therebetween.

24. The semiconductor element according to claim 22 ,

wherein the first sidewall and the second sidewall each comprise an insulating material.

25. A semiconductor device comprising the semiconductor element according to claim 22 ,

wherein the semiconductor device is an electronic device selected from the group consisting of a laptop personal computer, a portable information terminal, an e-book reader, a mobile phone, and a digital camera.

26. The semiconductor element according to claim 22 , wherein a carrier concentration in the oxide semiconductor layer is lower than 1×10 12 /cm 3 .

27. The semiconductor element according to claim 22 , wherein an off-state current of the semiconductor element is less than 1×10 −13 A.

28. A semiconductor element comprising:

an oxide semiconductor layer over and in contact with an insulating surface;

a pair of first conductive layers in contact with the oxide semiconductor layer, wherein the pair of first conductive layers is provided apart from each other in a channel length direction;

a pair of second conductive layers over the oxide semiconductor layer, wherein the pair of second conductive layers is provided apart from each other in a channel length direction;

a gate insulating layer over the oxide semiconductor layer, the pair of first conductive layers, and the pair of second conductive layers; and

a gate electrode layer over the gate insulating layer,

wherein one of the pair of second conductive layers is in contact with the oxide semiconductor layer and an inner side surface of one of the pair of first conductive layers,

wherein other of the pair of second conductive layers is in contact with the oxide semiconductor layer and an inner side surface of other of the pair of first conductive layers, and

wherein the pair of first conductive layers overlaps with the gate electrode layer.

29. The semiconductor element according to claim 28 , further comprising:

a third conductive layer on the insulating surface; and

an insulating layer covering the third conductive layer,

wherein the third conductive layer overlaps with the oxide semiconductor layer with the insulating layer interposed therebetween.

30. The semiconductor element according to claim 28 , wherein the pair of second conductive layers is not in contact with an upper surface of the pair of first conductive layers.

31. The semiconductor element according to claim 28 , wherein the oxide semiconductor layer comprises indium, gallium, or zinc.

32. The semiconductor element according to claim 28 , wherein a carrier concentration in the oxide semiconductor layer is lower than 1×10 12 /cm 3 .

33. A semiconductor device comprising the semiconductor element according to claim 28 , wherein the semiconductor device is an electronic device selected from the group consisting of a laptop personal computer, a portable information terminal, an e-book reader, a mobile phone, and a digital camera.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT FIRST INVENTOR'S NAME (CHANGED FROM"HLDETOMI SUZAWA" TO HIDEOMI SUZAWA") PREVIOUSLY RECORDED ON REEL 025543, FRAME 0329. Recorded Feb 14, 2011
From: SUZAWA, HIDEOMI; KURATA, MOTOMU; MIKAMI, MAYUMI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 026189/0163 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 28, 2010
From: SUZAWA, HIDETOMI; KURATA, MOTOMU; MIKAMI, MAYUMI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 025543/0329 →
Priority Claims (1)
JP 2009-276004 · Dec 4, 2009 · national
Continuity (1)
Related Publication 20110133177A1 · Jun 9, 2011