Through-substrate via waveguides
A device includes a semiconductor substrate of a first conductivity type, wherein the semiconductor substrate comprises a first surface and a second surface opposite the first surface. A through-substrate via (TSV) extends from the first surface to the second surface of the semiconductor substrate. A well region of a second conductivity type opposite the first conductivity type encircles the TSV, and extends from the first surface to the second surface of the semiconductor substrate.
1. A device comprising:
a semiconductor substrate of a first conductivity type, wherein the semiconductor substrate comprises a first surface and a second surface opposite the first surface;
a through-substrate via (TSV) extending from the first surface to the second surface of the semiconductor substrate; and
a well region of a second conductivity type opposite the first conductivity type encircling the TSV, wherein the well region extends from the first surface to the second surface of the semiconductor substrate.
2. The device of claim 1 further comprising an isolation layer encircling the TSV, wherein the well region encircles and contacts the isolation layer.
3. The device of claim 1 , wherein the first conductivity type is p-type, and the second conductivity type is n-type, and wherein the well region is an n-well region.
4. The device of claim 3 , wherein the n-well region and the semiconductor substrate form a diode of an electro-static discharge (ESD) circuit, and wherein the n-well region is connected to a signal input pad of the ESD circuit, and the semiconductor substrate is connected to a VSS node of the ESD circuit.
5. The device of claim 1 further comprising:
a heavily doped region of the first conductivity type in the semiconductor substrate, wherein a distance between the heavily doped region and the well region is less than about 1 μm; and
a capacitor coupled to the heavily doped region.
6. A device comprising:
a p-type semiconductor substrate;
a through-substrate via (TSV) in the p-type semiconductor substrate;
an isolation layer encircling the TSV; and
an n-well region encircling the isolation layer, wherein the n-well region is between and contacting the isolation layer and the p-type semiconductor substrate, and wherein an entirety of the isolation layer is physically spaced apart from the p-type semiconductor substrate.
7. The device of claim 6 , wherein the p-type semiconductor substrate comprises a first side and a second side opposite the first side, and wherein each of the TSV, the isolation layer, and the n-well region extends from the first side to the second side of the semiconductor substrate.
8. The device of claim 6 , wherein the n-well region and the p-type semiconductor substrate form a diode of an electro-static discharge (ESD) circuit, and wherein the n-well region is connected to a signal input pad of the ESD circuit, and the p-type semiconductor substrate is connected to a VSS node of the ESD circuit.
9. The device of claim 6 further comprising:
a heavily doped p-type region in the p-type semiconductor substrate, wherein a distance between the heavily doped p-type region and the n-well region is less than about 1 μm; and
a capacitor coupled to the heavily doped p-type region.
10. A device comprising:
a semiconductor substrate of a first conductivity type, wherein the semiconductor substrate comprises a first surface and a second surface opposite the first surface;
a through-substrate via (TSV) extending from the first surface to the second surface of the semiconductor substrate; and
a well region of a second conductivity type opposite the first conductivity type encircling the TSV, wherein the well region extends from the first surface to the second surface of the semiconductor substrate;
a heavily doped region of the first conductivity type in the semiconductor substrate, wherein a distance between the heavily doped region and the well region is less than about 1 μm; and
a capacitor coupled to the heavily doped region.
11. The device of claim 10 , wherein the well region and the semiconductor substrate form a diode of an electro-static discharge (ESD) circuit, and wherein the well region is connected to a signal input pad of the ESD circuit, and the semiconductor substrate is connected to a VSS node of the ESD circuit.