Systems and methods for performing forward error correction
In accordance with the teachings described herein, systems and methods are provided for performing forward error correction. A decoder for performing forward error correction for a frame in a data stream includes a state machine configured to determine if a code block within the frame received by the decoder is a complete code block or a partial code block, the frame including a plurality of code blocks. A decoding unit is configured to receive the code block, and, when the code block is a partial code block, to generate an output based on decoding the partial code block and an additional partial decoding result that is input to the decoding unit.
1. A decoder for performing forward error correction for a frame in a data stream, said decoder comprising:
a state machine configured to determine if a code block within the frame received by the decoder is a complete code block or a partial code block, the frame including a plurality of code blocks; and
a decoding unit configured to receive the code block, and, when the code block is a partial code block, to generate an output based on decoding the partial code block and an additional partial decoding result that is input to the decoding unit.
2. The decoder of claim 1 , wherein the decoding unit is further configured, when the code block is a complete code block, to generate an output based on decoding the complete code block.
3. The decoder of claim 1 , wherein the decoding unit includes a plurality of stages, each stage corresponding to a term of a polynomial representing the code block.
4. The decoder of claim 3 , wherein when the code block is determined to be a complete code block, the decoding unit is configured to input the code block to the plurality of stages starting at a beginning stage of the plurality of stages.
5. The decoder of claim 3 , wherein when the code block is determined to be a partial code block, the decoding unit is configured to input the code block to the plurality of stages starting at an intermediate stage of the plurality of stages, the intermediate stage being determined based on a pre-determined structure of the code block.
6. The decoder of claim 1 , wherein the decoding unit comprises:
a syndrome component configured to receive the code block, and to generate syndrome values of the code block, the syndrome component including a first plurality of stages, each of the first plurality of stages corresponding to a term of a polynomial representing the code block; and
an error correction component configured to receive the syndrome values, and to determine whether the code block contains an error based on the syndrome values, the error correction component including a second plurality of stages, each of the second plurality of stages corresponding to a term of the polynomial representing the code block.
7. The decoder of claim 6 , wherein when the code block is determined to be a complete code block, the syndrome component is configured to input the code block to the first plurality of stages starting at a beginning stage of the first plurality of stages.
8. The decoder of claim 6 , wherein when the code block is determined to be a partial code block, the syndrome component is configured to input the code block to the first plurality of stages starting at an intermediate stage of the first plurality of stages, the intermediate stage being determined based on a pre-determined structure of the code block.
9. The decoder of claim 6 , wherein when the code block is determined to be a complete code block, the error correction component is configured to input the syndrome values of the code block to the second plurality of stages starting at a beginning stage of the second plurality of stages.
10. The decoder of claim 6 , wherein when the code block is determined to be a partial code block, the error correction component is configured to input the syndrome values of the code block to the second plurality of stages starting at an intermediate stage of the second plurality of stages, the intermediate stage being determined based on a pre-determined structure of the code block.
11. The decoder of claim 6 , wherein the decoding unit further comprises:
a buffer configured to receive the syndrome values from the syndrome component when the code block is determined to be a partial code block.
12. The decoder of claim 11 , wherein the error correction component is configured to receive the syndrome values directly from the syndrome component when the code block is determined to be a complete code block; and
wherein the error correction component is configured to receive the syndrome values from the buffer after a predetermined delay when the code block is determined to be a partial code block.
13. The decoder of claim 1 , wherein the state machine is further configured to determine if the code block is a complete code block or a partial code block based at least in part on a pre-determined structure of the frame and a location of the code block within the frame.
14. The decoder of claim 13 , wherein the state machine is further configured to determine if the code block is a complete code block or a partial code block based at least in part on the number of bytes of original data for transmission contained in the code block.
15. The decoder of claim 14 , wherein the code block is determined to be a complete code block when the code block contains 239 bytes of the original data for transmission, or to be a partial code block when the code block contains 104 bytes of the original data for transmission.
16. A method for performing forward error correction for a frame of a data stream, said method comprising:
receiving the frame that includes a plurality of code blocks;
determining, using a state machine, for each of the plurality of the code blocks whether a code block is a complete code block or a partial code block; and
decoding the code block in a decoder based on the determination, wherein when the code block is determined to be a partial code block, an output is generated based on decoding the partial code block and an additional partial decoding result that is input to the decoder.
17. The method of claim 16 , wherein when the code block is determined to be a complete code block, an output is generated based on decoding the entire code block.
18. The method of claim 16 , wherein decoding the code block in the decoder based on the determination comprises:
generating syndrome values for the code block; and
performing error correction for the code block based on the generated syndrome values.
19. The method of claim 18 , wherein when the code block is determined to be a partial code block, the error correction for the code block is performed after a predetermined delay.
20. The method of claim 16 , wherein the determination of whether the code block is a complete code block or a partial code block is based at least in part on a pre-determined structure of the frame and a location of the code block within the frame.