Power switching arrangement
A circuit protection system for a power panel is disclosed. The circuit protection system includes a transistor connected in a channel of a power panel, the transistor connected between return connections of a load and a return path, and the power panel including a plurality of channels connected to the load. The circuit protection system also includes control circuitry electrically connected in parallel with the transistor, the control circuitry configured to selectively activate the transistor to allow current to pass through the transistor based on an observed voltage across the transistor.
1. A circuit protection system for a power panel, the system comprising:
a plurality of transistors connected in parallel in a channel of a power panel, each transistor connected between return connections of a load and a return path, the power panel including a plurality of channels connected to the load; and
control circuitry electrically connected in parallel with the plurality of transistors, the control circuitry configured to selectively activate the plurality of transistors to allow current to pass through each transistor based on an observed voltage across the plurality of transistors when the channel is active but block current through each of the plurality of transistors when the channel is inactive.
2. The circuit protection system of claim 1 , wherein a transistor from among the plurality of transistors is a MOSFET transistor.
3. The circuit protection system of claim 2 , wherein the MOSFET transistor is an enhanced MOSFET transistor.
4. The circuit protection system of claim 2 , wherein the transistor includes a body diode.
5. The circuit protection system of claim 4 , wherein the body diode has a forward voltage of at least approximately 0.45 V.
6. The circuit protection system of claim 1 , wherein the control circuitry includes a control signal connected to a gate of each transistor.
7. The circuit protection system of claim 6 , wherein the control circuitry is configured to activate the gate during use of the channel by the load.
8. The circuit protection system of claim 6 , wherein the control circuitry is configured to deactivate the gate upon detecting a reverse battery condition in the channel.
9. The circuit protection system of claim 6 , wherein the control circuitry is configured to deactivate the gate upon detecting a negative voltage condition in the channel.
10. A power panel useable in a power distribution system, the power panel comprising:
a plurality of channels, each channel including a supply path and a return path, the return path electrically connectable through the power panel to return connections of a load; and
a circuit protection system associated with one of the plurality of channels, the circuit protection system including:
a plurality of transistors connected between the return connections and the return path;
control circuitry electrically connected in parallel with the plurality of transistors, the control circuitry configured to selectively activate the plurality of transistors to allow current to pass through each transistor based on an observed voltage across the plurality of transistors when the channel is active but block current through each of the plurality of transistors when the channel is inactive.
11. The power panel of claim 10 , further comprising a plurality of circuit protection systems, each circuit protection system associated with a different one of the plurality of channels.
12. The power panel of claim 10 , wherein the control circuitry has a control signal connected to a gate of each transistor.
13. The power panel of claim 12 , wherein the control circuitry is configured to activate the gate during use of the channel by the load.
14. The power panel of claim 12 , wherein the control circuitry is configured to deactivate the gate upon detecting a reverse battery condition in the channel.
15. The power panel of claim 12 , wherein the control circuitry is configured to deactivate the gate upon detecting a negative voltage condition in the channel.
16. A method of providing circuit protection in a power distribution panel, the method comprising:
sensing a voltage above a threshold across a plurality of transistors connected between a return path and return connections included in a channel of a power panel, the return path and return connections configured to receive connections to a load; and
upon sensing the voltage above a threshold when the channel is active, activating each of the plurality of transistors with control circuitry connected in parallel with the plurality of transistors; and
otherwise deactivating each of the plurality of transistors, thereby blocking current through each of the plurality of transistors when the channel is inactive.
17. The method of claim 16 , further comprising:
sensing a voltage below a threshold across the plurality of transistors; and
upon sensing the voltage below a threshold, deactivating each of the plurality of transistors with the control circuitry.
18. The method of claim 16 , further comprising:
sensing a reverse battery condition with the control circuitry; and
upon sensing the reverse battery condition, deactivating each of the plurality of transistors with the control circuitry.
19. A power panel comprising:
a chassis including a top, a bottom, a front, a rear, and two sides;
a plurality of power input connections on the chassis, each power input connection including a source input connection and a return input connection;
a plurality of power output connections on the chassis, each of the power output connections including a source output connection and a return output connection, and each of the power output connections connected to a power input connection through the chassis; and
a protection circuit connected between at least one of the power output connections and a power input connection, the protection circuit including:
a plurality of transistors connected between the return output connection and the return input connection; and
control circuitry electrically connected in parallel with each transistor, the control circuitry configured to selectively activate the plurality of transistors to allow current to pass through each transistor based on an observed voltage across the plurality of transistors when the channel is active but block current through each of the plurality of transistors when the channel is inactive.
20. The power panel of claim 19 , wherein the plurality of power input connections are located on the front of the chassis.
21. The power panel of claim 19 , wherein the plurality of power output connections are located on modules mounted in the chassis.