Methods and apparatus for matrix decompositions in programmable logic devices

1. A processor for QR-decomposition, the processor comprising a boundary cell and at least one internal cell, wherein the boundary cell comprises:

a first CORDIC unit, for receiving real and imaginary components of an input value of the boundary cell, and for supplying first magnitude and phase values as outputs of the first CORDIC unit;

a second CORDIC unit, for receiving the first magnitude value as a first input, for supplying a second phase value as a first output, and for supplying a data value R of the boundary cell from a second output to a second input of the second CORDIC unit; and

a sine(sin)/cosine(cos) calculation unit, for receiving the first and second phase values as inputs, and for calculating sin and cos values based on the supplied first and second phase values; and

the at least one internal cell comprises:

a complex multiplication block, for receiving real and imaginary components of an input value of the internal cell, for receiving said sin and cos values from said boundary cell, for supplying a data value R of the internal cell from an output to an input of the complex multiplication block, and for supplying real and imaginary components of an output value of the internal cell.

2. The processor of claim 1 , wherein said boundary cell and said at least one internal cell are configured to share processor resources.

3. The processor of claim 1 , wherein said first CORDIC unit and said second CORDIC unit are configured to share processor resources.

4. The processor of claim 1 , wherein the boundary cell is configured to operate in a vectorize mode of the QR-decomposition and the at least one internal cell is configured to operate in a rotate mode of the QR-decomposition.

5. The processor of claim 1 , wherein the sin and cos values comprise a cos value for the input value of the boundary cell, the cos value calculated using the data value R of the boundary cell and a forgetting factor lambda.

6. The processor of claim 1 , wherein the boundary cell is configured for computing a squared magnitude value based on the real and imaginary components of the input value of the boundary cell and on the data value R of the boundary cell.

7. The processor of claim 6 , wherein the sin and cos values comprise:

a real sin value, calculated by dividing the real component of the input value of the boundary cell by the squared magnitude value; and

an imaginary sin value, calculated by dividing the imaginary component of the input value of the boundary cell by the squared magnitude value.

8. A method for performing QR-decomposition in a processor, the processor having a boundary cell and at least one internal cell, the method comprising:

receiving, at a first CORDIC unit of the boundary cell, real and imaginary components of an input value of the boundary cell;

supplying first magnitude and phase values as outputs of the first CORDIC unit based on the received real and imaginary components;

receiving the supplied first magnitude value as a first input of a second CORDIC unit of the boundary cell;

supplying a second phase value as a first output of the second CORDIC unit;

supplying a data value R of the boundary cell from a second output to a second input of the second CORDIC unit;

calculating, at a sine(sin)/cosine(cos) calculation unit of the boundary cell, sin and cos values based on the supplied first and second phase values;

processing, using complex multiplication circuitry of the at least one internal cell, real and imaginary components of an input value of the at least one internal cell and said calculated sin and cos values from said boundary cell; and

supplying, based on the processing using the complex multiplication circuitry, real and imaginary components of an output value of the at least one internal cell.

9. The method of claim 8 , further comprising:

supplying, based on the processing using the complex multiplication circuitry, a data value R of the at least one internal cell from an output to an input of the complex multiplication circuitry.

10. The method of claim 8 , wherein said boundary cell and said at least one internal cell are configured to share processor resources.

11. The method of claim 8 , wherein said first CORDIC unit and said second CORDIC unit are configured to share processor resources.

12. The method of claim 8 , further comprising operating the boundary cell in a vectorize mode of the QR-decomposition and operating the at least one internal cell in a rotate mode of the QR-decomposition.

13. The method of claim 8 , wherein calculating the sin and cos values comprises calculating a cos value for the input value of the boundary cell using the data value R of the boundary cell and a forgetting factor lambda.

14. The method of claim 8 , further comprising computing a squared magnitude value based on the real and imaginary components of the input value of the boundary cell and on the data value R of the boundary cell.

15. The method of claim 14 , wherein calculating the sin and cos values comprises calculating:

a real sin value, calculated by dividing the real component of the input value of the boundary cell by the squared magnitude value; and

an imaginary sin value, calculated by dividing the imaginary component of the input value of the boundary cell by the squared magnitude value.

16. A method of configuring a programmable integrated circuit device as a QR-decomposition processor having a boundary cell and at least one internal cell, said method comprising:

configuring logic of said programmable integrated circuit device as a first CORDIC unit in the boundary cell, for receiving real and imaginary components of an input value of the boundary cell of the boundary cell, and for supplying first magnitude and phase values as outputs of the first CORDIC unit;

configuring logic of said programmable integrated circuit device as a second CORDIC unit in the boundary cell, for receiving the first magnitude value as a first input, and for supplying a second phase value as a first output, and supplying a data value R of the boundary cell from a second output to a second input of the second CORDIC unit; and

configuring logic of said programmable integrated circuit device as a sine(sin)/cosine(cos) calculation unit in the boundary cell, for receiving the first and second phase values as inputs, and for calculating sin and cos values based on the supplied first and second phase values; and

configuring logic of said programmable integrated circuit device as a complex multiplication block in the at least one internal cell, for receiving real and imaginary components of an input value of the internal cell, for receiving said sin and cos values from said boundary cell, for supplying a data value R of the internal cell from an output to an input of the complex multiplication block, and for supplying real and imaginary components of an output value of the internal cell.

17. The method of claim 16 , wherein said boundary cell and said at least one internal cell are configured to share processor resources.

18. The method of claim 16 , wherein said configuring logic of said programmable integrated circuit device as a first CORDIC unit and said configuring logic of said programmable integrated circuit device as a second CORDIC unit comprise configuring logic of said programmable integrated circuit device to share processor resources between said first and second CORDIC units.

19. The method of claim 16 , wherein the boundary cell is configured to operate in a vectorize mode of the QR-decomposition and the at least one internal cell is configured to operate in a rotate mode of the QR-decomposition.

20. The method of claim 16 , wherein configuring logic of said programmable integrated circuit device as a sin/cos calculation unit comprises configuring logic for calculating:

a real sin value based on the real component of the input value of the boundary cell; and

an imaginary sin value based on the imaginary component of the input value of the boundary cell.