IP Library › Granted Patent US 8,564,918
Granted Patent B2
US 8,564,918 · App. 13/028,731 · Granted Oct 22, 2013

Pass gate off isolation

Inventors: Nickole Gagne (Saco, ME); Kenneth P. Snowdon (Falmouth, ME)
Assignee: Fairchild Semiconductor Corporation
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Quick Facts
Patent No.
US 8,564,918
App. No.
13/028,731
Granted
Oct 22, 2013
Kind
B2
Abstract

This document discusses methods and apparatus for preventing or reducing sub-threshold pass gate leakage. In an example, an apparatus can include a pass gate configured to electrically couple a first node with a second node in a first state and to electrically isolate the first node from the second node in a second state, control logic configured to control the pass gate, wherein the control logic includes a supply rail, and an over-voltage circuit configured to compare voltages received at a plurality of input nodes and to couple an output to an input node a highest voltage. In an example, the output of over-voltage circuit can be selectively coupled to the supply rail.

Claims (50)

1. An apparatus configured to prevent sub-threshold pass gate leakage, the apparatus comprising:

a pass gate configured to electrically couple a first node with a second node in a first state and to electrically isolate the first node from the second node in a second state;

control logic configured to control the pass gate, wherein the control logic includes a first supply rail;

a first over-voltage circuit having a plurality of input nodes and a first over-voltage circuit output, the plurality of input nodes including a first input node coupled to the first node of the pass gate, and a second input node coupled to the second node of the pass gate, the first over-voltage circuit configured to compare voltages received at the plurality of input nodes and to couple the output to an input node, of the plurality of input nodes, receiving a highest voltage; and

a switch configured to selectively couple the first over-voltage circuit output to the first supply rail.

2. The apparatus of claim 1 , wherein the switch is configured to couple the first over-voltage circuit output to the first supply rail when a first supply rail power supply is off.

3. The apparatus of claim 2 , including a second over-voltage circuit having a plurality of input nodes and a second over-voltage circuit output, the plurality of input nodes including a first input node coupled to the first node of the pass gate, a second input node coupled to the second node of the pass gate, and a third input node coupled to the first supply rail power supply, wherein the second over-voltage circuit is configured to compare voltages received at the plurality of input nodes and to couple the second over-voltage circuit output to an input node, of the plurality of inputs nodes, receiving a highest voltage; and

wherein the second over-voltage circuit output is selectively coupled to the first supply rail.

4. The apparatus of claim 3 , wherein the control logic includes a second supply rail, and wherein the second supply rail is coupled to the second over-voltage circuit output.

5. The apparatus of claim 3 , wherein the first over-voltage circuit having the plurality of input nodes includes a third input node configured to be coupled to a second supply rail power supply.

6. The apparatus of claim 5 , wherein the control logic is configured to receive a power supply selection signal; and

wherein the first supply rail is selectively coupled to the second supply rail using the power supply selection signal.

7. The apparatus of claim 6 , wherein the first over-voltage circuit is selectively coupled to the first supply rail using the power supply selection signal.

8. The apparatus of claim 5 , wherein the control logic is configured to receive a power supply selection signal; and

wherein the first over-voltage circuit is selectively coupled to the first supply rail using the power supply selection signal.

9. The apparatus of claim 5 , wherein the control logic is configured to receive a power supply selection signal; and

wherein the control logic includes:

a first inverter having an input and an output;

a second inverter having an input and an output, the input of the second inverter coupled to the output of the first inverter, the output of the second inverter coupled to a control node of the switch; and

wherein the input of the first inverter is configured to receive the power supply selection signal.

10. The apparatus of claim 9 , including a second switch having a first node coupled to the first supply rail, a second node coupled to the second supply rail, and a control node coupled to the output of the second inverter, the second switch configured to selectively couple the first supply rail and the second supply rail.

11. A method configured to prevent sub-threshold pass gate leakage, the method comprising:

electrically coupling a first node of a pass gate with a second node of the pass gate during a first state of the pass gate;

electrically isolating the first node of a pass gate and the second node of the pass gate during a second state of the pass gate;

controlling the first and second state of the pass gate using control logic having a first supply rail;

comparing voltages received at a plurality of input nodes of a first over-voltage circuit, the plurality of input nodes including a first input node coupled to the first node of the pass gate, and a second input node coupled to the second node of the pass gate;

coupling an output of the first over-voltage circuit to an input node, of the plurality of input nodes, receiving a highest voltage; and

selectively coupling the output of the first over-voltage circuit to the supply rail using a switch.

12. The method of claim 11 , wherein the selectively coupling the first over-voltage circuit includes selectively coupling the output of the first over-voltage circuit to the first supply rail using a switch when a first supply rail power supply is off.

13. The method of claim 12 , including

comparing voltages received at a plurality of input nodes of a second over-voltage circuit, the plurality of input nodes including a first input node coupled to the first node of the pass gate, a second input node coupled to the second node of the pass gate, and a third input node coupled to the first supply rail power supply;

coupling an output of the second over-voltage circuit to an input node, of the plurality of input nodes, receiving a highest voltage; and

selectively coupling the output of the second over-voltage circuit to the first supply rail.

14. The method of claim 13 , including receiving a second supply voltage at a third node of the first over-voltage circuit.

15. The method of claim 14 , including:

receiving a power supply selection signal at the control logic;

during a first state of the power supply selection signal,

coupling a second supply rail of the control logic to the first supply rail, the second supply rail coupled to the output of the second over-voltage circuit; and

isolating the output of the first over-voltage circuit from the first supply rail; and

during a second state of the power supply signal,

coupling the output of the first over-voltage circuit to the first supply rail using the switch; and

isolating the second supply rail from the first supply rail.

16. The method of claim 15 , wherein the receiving a power supply selection signal includes:

receiving the power supply selection signal at a first inverter;

providing an inverted, power supply selection signal from an output of the first inverter;

receiving the inverted, power supply selection signal at a second inverter;

providing a twice-inverted power supply selection signal at an output of the second inverter; and

receiving the twice-inverted, power supply selection signal at a control node of the switch.

17. The method of claim 16 , wherein the selectively coupling the output of the second over-voltage circuit to the supply rail includes selectively coupling the output of the second over-voltage circuit to the first supply rail using a second switch.

18. The method of claim 17 , wherein the selectively coupling the output of the second over-voltage circuit to the first supply rail using a second switch includes receiving the twice-inverted, power supply selection signal at a control node of the second switch.

Assignments (7)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 058871, FRAME 0799 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 065653/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 040075, FRAME 0644 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0536 →
SECURITY INTEREST Recorded Nov 12, 2021
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 058871/0799 →
RELEASE OF SECURITY INTEREST Recorded Oct 28, 2021
From: DEUTSCHE BANK AG NEW YORK BRANCH
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 057969/0206 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2021
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 057694/0374 →
PATENT SECURITY AGREEMENT Recorded Sep 19, 2016
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 040075/0644 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 2, 2012
From: GAGNE, NICKOLE; SNOWDON, KENNETH P.
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 027653/0057 →
Continuity (1)
Related Publication 20120206845A1 · Aug 16, 2012