IP Library › Granted Patent US 8,575,614
Granted Patent B2
US 8,575,614 · App. 12/530,612 · Granted Nov 5, 2013

Display device

Inventor: Naoki Makita (Osaka, JP)
Assignee: Sharp Kabushiki Kaisha
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Quick Facts
Patent No.
US 8,575,614
App. No.
12/530,612
Granted
Nov 5, 2013
Kind
B2
Abstract

A semiconductor device 100 includes a thin-film transistor 123 and a thin-film diode 124 . The thin-film transistor 123 includes a semiconductor layer S 1 with a channel region 114 , a source region and a drain region 112 , a gate electrode 109 that controls the conductivity of the channel region 114 , and a gate insulating film 108 arranged between the semiconductor layer and the gate electrode 109 . The thin-film diode 124 includes a semiconductor layer S 2 with at least an n-type region 113 and a p-type region 117 . The respective semiconductor layers S 1 and S 2 of the thin-film transistor 123 and the thin-film diode 124 are portions of a single crystalline semiconductor layer, obtained by crystallizing the same crystalline semiconductor film, but have been crystallized to mutually different degrees.

Claims (16)

1. A display device comprising:

a display area with a number of display sections; and

a frame area surrounding the display area,

wherein the display device further includes at least one photosensor section with a thin-film diode, and

wherein each said display section includes an electrode and a thin-film transistor connected to the electrode, and

wherein the thin-film transistor and the thin-film diode are arranged on the same light-transmitting substrate, and

wherein the thin-film transistor includes: a semiconductor layer with a channel region, a source region and a drain region; a gate electrode that controls the conductivity of the channel region; and a gate insulating film arranged between the semiconductor layer and the gate electrode, and

wherein the thin-film diode includes a semiconductor layer with an n-type region, a p-type region and an intrinsic region interposed between the n- and p-type regions, and

wherein the respective semiconductor layers of the thin-film transistor and the thin-film diode are portions of a single crystalline semiconductor layer that has been crystallized or re-crystallized by irradiating the same amorphous semiconductor film with a laser beam, and

wherein the channel region of the semiconductor layer of the thin-film transistor and the intrinsic region of the semiconductor layer of the thin-film diode have been crystallized to mutually different degrees, and

wherein the channel region of the semiconductor layer of the thin-film transistor has a greater average surface roughness Ra than the intrinsic region of the semiconductor layer of the thin-film diode, and

wherein the thin-film diode further includes a heat sink layer that is located between the semiconductor layer of the thin-film diode and the substrate, made of an opaque material, and arranged so as to overlap with at least the intrinsic region of the semiconductor layer of the thin-film diode when viewed from under the back surface of the substrate.

2. The display device of claim 1 , further comprising a backlight.

3. The display device of claim 2 , wherein the at least one photosensor section includes a number of photosensor sections, each of which is arranged in the display area with respect to either its associated display section or its associated set of at least two of the display sections.

4. The display device of claim 2 , wherein the backlight includes a backlight controller that adjusts the intensity of the light emitted from the backlight, and

wherein the photosensor section is arranged in the frame area and generates an illumination signal representing the illumination of external light and outputs the signal to the backlight controller.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 15, 2009
From: MAKITA, NAOKI
To: SHARP KABUSHIKI KAISHA
Reel/Frame 023229/0265 →
Priority Claims (1)
JP 2007-116098 · Apr 25, 2007 · national
Continuity (1)
Related Publication 20100065851A1 · Mar 18, 2010