Printed board and semiconductor integrated circuit
An IC which includes a first circuit and a plurality of first paired terminals each including a first power supply terminal and a first GND terminal which are connected to the first circuit, and a second circuit and a plurality of second paired terminals each including a second power supply terminal and a second GND terminal which are connected to the second circuit. The first and second paired terminals are isolated inside. A printed board with the IC mounted has an inductor which is provided in a route that guides a wiring line from the first GND terminal to the second GND terminal and the GND of the printed board. The printed board has a portion where each of the first GND terminals is arranged inside the terminal array of the IC. The inductor suppresses a high-frequency potential variation generated by the operation of the first circuit.
1. A printed board comprising:
a first circuit, a plurality of first pairs of terminals each including a first power supply terminal and a first GND terminal, which is connected to said first circuit, a second circuit, a plurality of second pairs of terminals each including a second power supply terminal and a second GND terminal, connected to said second circuit, and an IC, said first pairs of terminals and said second pairs of terminals being isolated, wherein said first circuit operates by higher frequency than said second circuit;
first GND patterns connected to said plurality of first GND terminals;
a second GND pattern isolated from said first GND patterns and connecting to said plurality of second GND terminals; and
a first suppressing unit configured to suppress propagation of the high-frequency noise from the first circuit, provided between said first GND patterns and said second GND pattern,
wherein said first GND patterns connecting to at least two first GND terminals of a plurality of first GND terminals are provided in a portion arranged inside a terminal array of said IC and a portion arranged outside said terminal array of said IC,
wherein said first GND pattern provided in said portion inside said terminal array of said IC is larger in size than is said first GND pattern provided in said portion outside said terminal array of said IC, and
wherein said first GND patterns and said second GND patterns are isolated inside said terminal array of said IC.
2. The printed board according to claim 1 , wherein said first suppressing unit comprises pattern wiring line connecting said first GND pattern and said second GND pattern.
3. The printed board according to claim 1 , wherein said first suppressing unit includes a ferrite bead.
4. The printed board according to claim 1 , wherein, in said portion inside said terminal array of said IC, a high-frequency impedance of wiring lines connecting said plurality of first GND terminals respectively is smaller than a high-frequency impedance of wiring lines connecting said plurality of second GND terminals respectively.
5. The printed board according to claim 1 , further comprising a first capacitor connected between said first power supply terminal and said first GND terminal.
6. The printed board according to claim 1 , further comprising a second suppressing unit configured to suppress propagation of the high-frequency noise from said first circuit provided in a path in which a wiring line from said first power supply terminal is guided to a wiring line from said second power supply terminal and a pattern of power supply voltage, and
a second capacitor connected between said second power supply terminal and said second GND terminal.
7. The printed board according to claim 6 , wherein
said second suppressing unit comprises a pattern wiring line connecting between said first power supply terminal and said second power supply terminal, and
a pattern connected to said first power supply terminal and a pattern connected to said second power supply terminal are physically isolated and disposed.
8. The printed board according to claim 6 , wherein said second suppressing unit includes a ferrite bead.
9. The printed board according to claim 6 , wherein said first suppressing unit and second suppressing unit include a common-mode choke.
10. The printed board according to claim 1 , wherein said IC comprises an ASIC, said first circuit is a core circuit of said ASIC, and said second circuit is an I/O buffer circuit of said ASIC.