IP Library › Granted Patent US 8,576,654
Granted Patent B2
US 8,576,654 · App. 13/414,014 · Granted Nov 5, 2013

Non-volatile memory device having phase-change material and method for fabricating the same

Inventors: Yong-shik Shin (Hwaseong-si, KR); Ji-won Jung (Seoul, KR)
Assignee: Samsung Electronics Co., Ltd.
G11C17/18
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Quick Facts
Patent No.
US 8,576,654
App. No.
13/414,014
Granted
Nov 5, 2013
Kind
B2
Abstract

A non-volatile memory device includes a plurality of memory blocks. Each of memory blocks includes a main area including a plurality of first memory cells having a phase-change material and a spare area including at least one second memory cell for storing initial information about the plurality of first memory cells. In the non-volatile memory device, a circuit of the at least one second memory cell is cut off according to the initial information, and the initial information is defective block information that is information about a defect of the plurality of memory blocks.

Claims (49)

1. A non-volatile memory device, comprising:

a plurality of memory blocks, each comprising:

a main area including a plurality of first memory cells having a phase-change material; and

a spare area including at least one second memory cell for storing initial information about the plurality of first memory cells,

wherein a circuit of the at least one second memory cell is cut off according to the initial information, and the initial information is defective block information that is information about a defect of the plurality of memory blocks, and

wherein the at least one second memory cell comprises:

a phase-change element connected to a bit line;

a switching element opening and closing a connection between the phase-change element and ground according to a signal applied via a word line; and

a fuse layer that is opened by an electromagnetic wave, and

wherein the fuse layer is arranged between the bit line and the phase-change element, between the phase-change element and the switching element, or between the switching element and the ground.

2. The non-volatile memory device of claim 1 , wherein, in a read operation, the at least one second memory cell is unchangedly read as the same logic value.

3. The non-volatile memory device of claim 1 , wherein the at least one second memory cell is provided in plural, each second memory cell comprises a phase-change element connected to a bit line and a transistor element that opens and closes a connection between the phase-change element and ground according to a signal applied via a word line, and the word line that is commonly connected to gates of the plurality of transistor elements is floated by cutting when a block including the plurality of second memory cells is defective.

4. The non-volatile memory device of claim 1 , wherein the at least one second memory cell comprises a phase-change element and a diode element serially connected between a bit line and a word line, and a fuse layer that is opened by an electromagnetic wave and arranged between the bit line and the phase-change element or between the phase-change element and the diode element.

5. The non-volatile memory device of claim 1 , wherein the at least one second memory cell is provided in plural, each second memory cell comprises a phase-change element and a diode element that are serially connected to a bit line and a word line, and the word line that is commonly connected to gates of the plurality of diode elements is floated by cutting when a block including the plurality of second memory cells is defective.

6. The non-volatile memory device of claim 1 , wherein the at least one second memory cell comprises:

a contact plug arranged on a substrate;

a fuse layer arranged on the contact plug;

a lower electrode arranged on the fuse layer;

a phase-change material layer arranged on the lower electrode; and

an upper electrode arranged on the phase-change material layer.

7. The non-volatile memory device of claim 6 , wherein the lower electrode has a cross-section of a trapezoid having a lower side shorter than an upper side.

8. The non-volatile memory device of claim 1 , wherein the at least one second memory cell comprises:

a ground contact plug arranged on a substrate; and

a fuse layer arranged on the ground contact plug,

wherein the ground contact plug is connected to ground via the fuse layer.

9. The non-volatile memory device of claim 1 , wherein the at least one second memory cell comprises:

a contact plug arranged on a substrate;

a lower electrode arranged on the contact plug;

a phase-change material layer arranged on the lower electrode;

an upper electrode arranged on the phase-change material layer; and

a fuse layer arranged on the upper electrode.

10. The non-volatile memory device of claim 1 , wherein the at least one second memory cell comprises:

a word line arranged on a substrate;

an n-type semiconductor layer arranged on the word line;

a p-type semiconductor layer arranged on the n-type semiconductor layer;

a contact plug arranged on the p-type semiconductor layer;

a fuse layer arranged on the contact plug;

a lower electrode arranged on the fuse layer;

a phase-change material layer arranged on the lower electrode; and

an upper electrode arranged on the phase-change material layer.

11. The non-volatile memory device of claim 1 , wherein the at least one second memory cell comprises:

a word line arranged on a substrate;

an n-type semiconductor layer arranged on the word line;

a p-type semiconductor layer arranged on the n-type semiconductor layer;

a contact plug arranged on the p-type semiconductor layer;

a lower electrode arranged on the contact plug;

a phase-change material layer arranged on the lower electrode;

an upper electrode arranged on the phase-change material layer; and

a fuse layer arranged on the upper electrode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 8, 2012
From: SHIN, YONG-SHIK; JUNG, JI-WON
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 027829/0370 →
Priority Claims (1)
KR 10-2011-0057001 · Jun 13, 2011 · national
Continuity (1)
Related Publication 20120314492A1 · Dec 13, 2012