IP Library › Granted Patent US 8,582,615
Granted Patent B2
US 8,582,615 · App. 13/064,424 · Granted Nov 12, 2013

Semiconductor light-emitting device

Inventors: Osamu Maeda (Miyagi, JP); Masaki Shiozaki (Kanagawa, JP); Susumu Sato (Kanagawa, JP); Takahiro Arakida (Kanagawa, JP); Shiro Uchida (Tokyo, JP)
Assignee: Sony Corporation
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Quick Facts
Patent No.
US 8,582,615
App. No.
13/064,424
Granted
Nov 12, 2013
Kind
B2
Abstract

There is provided a semiconductor light-emitting device including a temperature detecting section which is allowed to accurately estimate an element temperature. The semiconductor light-emitting device includes: one or a plurality of surface-emitting semiconductor light-emitting sections and one or a plurality of semiconductor temperature detecting sections on a semiconductor substrate, the surface-emitting semiconductor light-emitting sections emitting light in a direction normal to the semiconductor substrate, the semiconductor temperature detecting sections not emitting light to outside. The semiconductor light-emitting sections and the semiconductor temperature detecting sections have a PN junction or a PIN junction in a direction normal to the semiconductor substrate.

Claims (20)

1. A semiconductor light-emitting device comprising:

one or more of surface-emitting semiconductor light-emitting sections and one or more semiconductor temperature detecting sections on a semiconductor substrate, the surface-emitting semiconductor light-emitting sections emitting light in a direction normal to the semiconductor substrate, the semiconductor temperature detecting sections not emitting light,

wherein the semiconductor light-emitting sections and the semiconductor temperature detecting sections have a PN junction or a PIN junction in a direction normal to the semiconductor substrate, the semiconductor light-emitting device further comprising:

a circuit for adjusting an offset of a detection voltage transmitted from each of the semiconductor temperature detecting sections.

2. The semiconductor light-emitting device according to claim 1 , wherein

the semiconductor light-emitting sections and the semiconductor temperature detecting sections have the same configuration of the PN junction or the PIN junction.

3. The semiconductor light-emitting device according to claim 2 , wherein

both of the semiconductor light-emitting sections and the semiconductor temperature detecting sections have a laminate configuration including a first multilayer reflective mirror, an active layer and a second multilayer reflective minor in this order.

4. The semiconductor light-emitting device according to claim 1 , wherein

the semiconductor light-emitting sections and the semiconductor temperature detecting sections have the same laminate configuration.

5. The semiconductor light-emitting device according to claim 1 , wherein

both of the semiconductor light-emitting sections and the semiconductor temperature detecting sections are formed on the semiconductor substrate as a growth substrate.

6. The semiconductor light-emitting device according to claim 1 , wherein

the semiconductor temperature detecting sections each have a low-reflectivity layer on a top surface thereof.

7. The semiconductor light-emitting device according to claim 1 , wherein

the semiconductor temperature detecting sections each include a metal layer on a whole top surface thereof.

8. A semiconductor light-emitting device comprising:

a plurality of surface-emitting semiconductor light-emitting sections and a plurality of semiconductor temperature detecting sections on a semiconductor substrate, the semiconductor light-emitting sections emitting light in a direction normal to the semiconductor substrate, the semiconductor temperature detecting sections not emitting light to outside, and

a circuit for adjusting an offset of a detection voltage transmitted from each of the semiconductor temperature detecting sections,

wherein the semiconductor light-emitting sections and the semiconductor temperature detecting sections have a PN junction or a PIN junction in a direction normal to the semiconductor substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 2, 2011
From: MAEDA, OSAMU; SHIOZAKI, MASAKI; SATO, SUSUMU; ARAKIDA, TAKAHIRO; UCHIDA, SHIRO
To: SONY CORPORATION
Reel/Frame 026450/0560 →
Priority Claims (1)
JP P2010-086313 · Apr 2, 2010 · national
Continuity (1)
Related Publication 20110243174A1 · Oct 6, 2011