Lead frame and semiconductor package using the same
A semiconductor package includes a lead frame, a first chip, a second chip, a plurality of bonding wires and a mold compound. The lead frame includes a pad portion at a center of the frame and a plurality of lead portions. The pad portion and the plurality of lead portions collectively define a receiving portion. The first chip is securely received in the receiving portion. The second chip is mechanically attached to the first chip. The plurality of bonding wires electrically connect the second chip to the plurality of lead portions. The mold compound encapsulates the lead frame, the first chip, the second chip and the plurality of bonding wires to form the semiconductor package.
1. A lead frame, comprising:
a frame portion comprising a first surface and a second surface opposite to the first surface;
a pad portion at a center of the lead frame to support semiconductor elements;
a plurality of support bars connecting the pad portion to corners of the frame portion; and
a plurality of lead portions, peripherally extending from the frame portion towards the pad portion, each of the plurality of lead portions comprising a support end, a connecting terminal and a jointing end, the jointing end jointing the frame portion with the connecting terminal, and the connecting terminal being disposed between the jointing end and the support end;
wherein the support ends and the jointing ends are configured on the first surface, the connecting terminal protrudes away from the first surface, the connecting terminals, the support ends and the pad portion collectively define a receiving portion, and the connecting terminal and the pad portion protrude away from the second surface to form a plurality of step portions.
2. The lead frame as claimed in claim 1 , wherein the plurality of lead portions are spaced from each other with a first gap and spaced from the pad portion with a second gap.
3. The lead frame as claimed in claim 2 , wherein at least one lead portion only comprises the jointing end and the connecting terminal, and is spaced from the pad portion with a third gap.
4. A semiconductor package, comprising:
a lead frame, comprising a pad portion at a center of the lead frame and a plurality of lead portions, the pad portion and the plurality of lead portions collectively defining a receiving portion;
a first chip, securely received in the receiving portion;
a second chip, mechanically attached to the first chip;
a plurality of bonding wires, electrically connecting the second chip to the plurality of lead portions; and
a mold compound, encapsulating the lead frame, the first chip, the second chip and the plurality of bonding wires.
5. The semiconductor package as claimed in claim 4 , wherein the lead frame comprises a frame portion having a hollow rectangular structure, and the plurality of lead portions peripherally extend from four sides of the rectangular structure of the frame portion towards the pad portion.
6. The semiconductor package as claimed in claim 5 , wherein each of the plurality of lead portions comprises a support end, a connecting terminal and a jointing end, the jointing end joints the frame portion with the connecting terminal, and the connecting terminal is disposed between the support end and the jointing end.
7. The semiconductor package as claimed in claim 6 , wherein the lead frame has a first surface and a second surface opposite to the first surface, and one side of the frame portion, the pad portion, the support ends and the jointing ends are configured on the first surface.
8. The semiconductor package as claimed in claim 7 , wherein the connecting terminal and the pad portion protrude away from the second surface to form a plurality of step portions.
9. The semiconductor package as claimed in claim 4 , wherein the lead frame comprises a plurality of support bars connecting the pad portion to corners of the frame portion, and one side of the frame portion, the pad portion and the plurality of support bars collectively form the first surface.
10. The semiconductor package as claimed in claim 9 , wherein the plurality of lead portions are spaced from each other with a first gap and spaced from the pad portion with a second gap.
11. The semiconductor package as claimed in claim 4 , wherein each of the plurality of bonding wires is a gold wire.
12. The semiconductor package as claimed in claim 4 , wherein the second chip is mounted on the first chip via an adhesive.