IP Library › Granted Patent US 8,597,427
Granted Patent B2
US 8,597,427 · App. 12/201,546 · Granted Dec 3, 2013

Method of manufacturing a semiconductor device

Inventor: Satoru Okamoto (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 8,597,427
App. No.
12/201,546
Granted
Dec 3, 2013
Kind
B2
Abstract

A semiconductor device is provided which is constituted by semiconductor devices including a thin film transistor with a GOLD structure, the GOLD structure thin film transistor being such that: a semiconductor layer, a gate insulating film, and a gate electrode are formed in lamination from the side closer to a substrate; the gate electrode is constituted of a first-layer gate electrode and a second-layer gate electrode shorter in the size than the first-layer gate electrode; the first-layer gate electrode corresponding to the region exposed from the second-layer gate electrode is formed into a tapered shape so as to be thinner toward the end portion; a first impurity region is formed in the semiconductor layer corresponding to the region with the tapered shape; and a second impurity region having the same conductivity as the first impurity region is formed in the semiconductor layer corresponding to the outside of the first-layer gate electrode, which is characterized in that a dry etching process consisting of one step or two steps is applied to the formation of the gate electrode.

Claims (54)

1. A method of manufacturing a semiconductor device, comprising:

forming a first conductive film over an insulating film;

forming a second conductive film over the first conductive film;

forming a mask over the second conductive film; and

performing an Inductively-Coupled-Plasma etching process to form an etched second conductive film having a second width and an etched first conductive film having a first width, thereby forming an electrode including the etched first conductive film having the first width and the etched second conductive film having the second width on the etched first conductive film,

wherein the etched first conductive film extends beyond side edges of the etched second conductive film.

2. A method according to claim 1 , wherein an Inductively-Coupled-Plasma etching process is performed using etching gases containing fluorine gas, chlorine gas, and oxygen.

3. A method according to claim 2 , wherein the fluorine gas is SF 6 , and the chlorine gas is Cl 2 .

4. A method according to claim 1 , wherein the insulating film comprises silicon oxide.

5. A method according to claim 1 , wherein the first conductive film has a thickness of 5 to 50 nm.

6. A method according to claim 1 , wherein the second conductive film has a thickness of 200 to 600 nm.

7. A method according to claim 1 , wherein a chamber pressure during the Inductively-Coupled-Plasma etching process is in a range of 1.0 to 1.6 Pa.

8. A method according to claim 1 , wherein an ICP power during the Inductively-Coupled-Plasma etching process is in a range of 1.02 to 2.04 W/cm 2 .

9. A method according to claim 1 , wherein a bias power density for the Inductively-Coupled-Plasma etching process is in a range of 0.03 to 0.19 W/cm 2 .

10. The method according to claim 1 , wherein the first conductive film comprises tantalum.

11. The method according to claim 1 , wherein the second conductive film comprises tungsten.

12. A method of manufacturing a semiconductor device, comprising:

forming a semiconductor film over an insulating substrate;

forming an insulating film over the semiconductor film;

forming a first conductive film over the insulating film;

forming a second conductive film over the first conductive film;

forming a mask over the second conductive film; and

performing an Inductively-Coupled-Plasma etching process to form an etched second conductive film having a second width and an etched first conductive film having a first width, thereby forming an electrode including the etched first conductive film having the first width and the etched second conductive film having the second width on the etched first conductive film,

wherein the etched first conductive film extends beyond side edges of the etched second conductive film.

13. A method according to claim 12 , wherein an Inductively-Coupled-Plasma etching process is performed using etching gases containing fluorine gas, chlorine gas, and oxygen.

14. A method according to claim 13 , wherein the fluorine gas is SF 6 , and the chlorine gas is Cl 2 .

15. A method according to claim 12 , wherein the insulating film comprises silicon oxide.

16. A method according to claim 12 , wherein the first conductive film has a thickness of 5 to 50 nm.

17. A method according to claim 12 , wherein the second conductive film has a thickness of 200 to 600 nm.

18. A method according to claim 12 , wherein a chamber pressure during the Inductively-Coupled-Plasma etching process is in a range of 1.0 to 1.6 Pa.

19. A method according to claim 12 , wherein an ICP power during the Inductively-Coupled-Plasma etching process is in a range of 1.02 to 2.04 W/cm 2 .

20. A method according to claim 12 , wherein a bias power density for the Inductively-Coupled-Plasma etching process is in a range of 0.03 to 0.19 W/cm 2 .

21. The method according to claim 12 , wherein the first conductive film comprises tantalum.

22. The method according to claim 12 , wherein the second conductive film comprises tungsten.

23. A method of manufacturing a semiconductor device, comprising:

forming a semiconductor film over an insulating substrate;

forming a first insulating film over the semiconductor film;

forming a first conductive film over the insulating film;

forming a second conductive film over the first conductive film;

forming a mask over the second conductive film;

performing an Inductively-Coupled-Plasma etching process to form an etched second conductive film having a second width and an etched first conductive film having a first width, thereby forming an electrode including the etched first conductive film having the first width and the etched second conductive film having the second width on the etched first conductive film;

forming a second insulating film over the electrode and the first insulating film; and

forming a wiring to connect with the semiconductor film through a contact hole formed in the second insulating film,

wherein the etched first conductive film extends beyond side edges of the etched second conductive film.

24. A method according to claim 23 , wherein an Inductively-Coupled-Plasma etching process is performed using etching gases containing fluorine gas, chlorine gas, and oxygen.

25. A method according to claim 24 , wherein the fluorine gas is SF 6 , and the chlorine gas is Cl 2 .

26. A method according to claim 23 , wherein the first insulating film comprises silicon oxide.

27. A method according to claim 23 , wherein the first conductive film has a thickness of 5 to 50 nm.

28. A method according to claim 23 , wherein the second conductive film has a thickness of 200 to 600 nm.

29. A method according to claim 23 , wherein a chamber pressure during the Inductively-Coupled-Plasma etching process is in a range of 1.0 to 1.6 Pa.

30. A method according to claim 23 , wherein an ICP power during the Inductively-Coupled-Plasma etching process is in a range of 1.02 to 2.04 W/cm 2 .

31. A method according to claim 23 , wherein a bias power density for the Inductively-Coupled-Plasma etching process is in a range of 0.03 to 0.19 W/cm 2 .

32. The method according to claim 23 , wherein the first conductive film comprises tantalum.

33. The method according to claim 23 , wherein the second conductive film comprises tungsten.

Priority Claims (1)
JP 2001-342212 · Nov 7, 2001 · national
Continuity (3)
Continuation 10876737 · Jun 28, 2004
Continuation 10287588 · Nov 5, 2002
Related Publication 20090004872A1 · Jan 1, 2009