Nonvolatile semiconductor memory device and manufacturing method thereof
A nonvolatile semiconductor memory device has a first wire, a second wire, and a memory cell electrically coupled to the first wire at one end and to the second wire at the other end. The memory cell has a resistance change layer to store information by changing a resistance value and a first electrode and a second electrode coupled to both ends of the resistance change layer and not containing a precious metal. The first electrode includes an outside electrode and an interface electrode formed between the outside electrode and the resistance change layer. The thickness of the interface electrode is less than the thickness of the outside electrode. The resistivity of the interface electrode is higher than the resistivity of the outside electrode. The resistance value of the first electrode is lower than the resistance value of the resistance change layer in a low resistance state.
1. A nonvolatile semiconductor memory device comprising:
a first wire;
a second wire; and
a memory cell electrically coupled to said first wire at an end and said second wire at the other end,
wherein said memory cell includes:
a resistance change layer to memorize information by changing a resistance value; and
a first electrode and a second electrode being coupled to both the ends of said resistance change layer and not containing a precious metal,
wherein said first electrode includes:
a first outside electrode; and
a first interface electrode formed between said first outside electrode and said resistance change layer,
wherein the thickness of said first interface electrode is thinner than the thickness of said first outside electrode,
wherein the resistivity of said first interface electrode is higher than the resistivity of said first outside electrode, and
wherein the resistance value of said first electrode is lower than the resistance value of said resistance change layer in a low resistance state.
2. A nonvolatile semiconductor memory device according to claim 1 , wherein the material of said first interface electrode is hardly oxidized in comparison with an element included in said resistance change layer.
3. A nonvolatile semiconductor memory device according to claim 1 , wherein said first interface electrode comprises a transition metal nitride.
4. A nonvolatile semiconductor memory device according to claim 3 , wherein said first interface electrode comprises a titanium nitride or a tantalum nitride.
5. A nonvolatile semiconductor memory device according to claim 1 , wherein said first interface electrode comprises 2 to 20 atomic layers.
6. A nonvolatile semiconductor memory device according to claim 1 , wherein the thickness of said first electrode is larger than 0% to not larger than 80% of the diameter of filament formed in said resistance change layer.
7. A nonvolatile semiconductor memory device according to claim 1 ,
wherein said second electrode includes:
a second outside electrode; and
a second interface electrode formed between said second outside electrode and said resistance change layer,
wherein the thickness of said second interface electrode is thinner than the thickness of said second outside electrode,
wherein the resistivity of said second interface electrode is higher than the resistivity of said second outside electrode, and
wherein the resistance value of said second electrode is lower than the resistance value of said resistance change layer in a low resistance state.
8. A nonvolatile semiconductor memory device according to claim 1 ,
wherein said first outside electrode comprises a metal film, and
wherein said first interface electrode comprises a metal nitride.
9. A nonvolatile semiconductor memory device according to claim 8 , wherein the nitrogen concentrations in said first interface electrode and said first outside electrode decrease continuously from said first interface electrode toward said first outside electrode.
10. A nonvolatile semiconductor memory device according to claim 1 , wherein said memory cell further has a transistor coupled in series to either said first electrode or said second electrode.
11. A nonvolatile semiconductor memory device according to claim 1 , wherein said memory cell further has a diode coupled in series to either said first electrode or said second electrode.