Thin film transistor and manufacturing method thereof
View Patent ↗Disclosed is a thin film transistor including: a gate insulating layer covering a gate electrode; a microcrystalline semiconductor region over the gate insulating layer; a pair of amorphous semiconductor region over the microcrystalline semiconductor; a pair of impurity semiconductor layers over the amorphous semiconductor regions; and wirings over the impurity semiconductor layers. The microcrystalline semiconductor region has a surface having a projection and depression on the gate insulating layer side. The microcrystalline semiconductor region includes a first microcrystalline semiconductor region which is not covered with the amorphous regions and a second microcrystalline semiconductor region which is in contact with the amorphous semiconductor regions. A thickness d 1 of the first microcrystalline semiconductor region is smaller than a thickness d 2 of the second microcrystalline semiconductor region and d 1 is greater than or equal to 30 nm.
1. A semiconductor device having a thin film transistor, the thin film transistor comprising:
a gate electrode;
a gate insulating layer over the gate electrode;
a microcrystalline semiconductor region over and in contact with the gate insulating layer;
a pair of amorphous semiconductor regions over and in contact with part of the microcrystalline semiconductor region;
a pair of impurity semiconductor layers over the pair of amorphous semiconductor regions; and
a pair of wirings over and in contact with the pair of impurity semiconductor layers,
wherein the microcrystalline semiconductor region includes a first region which is not covered with the pair of amorphous semiconductor regions and a second region which is in contact with the pair of amorphous semiconductor regions,
wherein an upper surface of the second region has a projection and a depression and flatness of the first region is higher than flatness of the second region, and
wherein a thickness d 1 of the first region is smaller than a thickness d 2 of the second region and the thickness d 1 is greater than or equal to 30 nm, where d 2 is a distance between an upper surface of the gate insulating layer and a tip of the projection.
2. The semiconductor device according to claim 1 ,
wherein the pair of amorphous semiconductor regions contain nitrogen, and
wherein a maximum concentration of nitrogen estimated by a secondary ion mass spectrometry is from 1×10 20 atoms/cm 3 to 1×10 21 atoms/cm 3 inclusive.
3. The semiconductor device according to claim 1 ,
wherein entire region of the microcrystalline semiconductor region overlaps with the gate electrode.
4. The semiconductor device according to claim 1 ,
wherein the projection has a shape whose width is narrowed from the gate insulating layer toward the pair of amorphous semiconductor regions.
5. The semiconductor device according to claim 1 ,
wherein the microcrystalline semiconductor region has a crystal grain whose grains size is from 2 nm to 200 nm.
6. An electronic device comprising the semiconductor device according to claim 1 .
7. The electronic device according to claim 6 ,
wherein the electronic device is selected from an electronic book reader, a television, a computer, a camera, a mobile phone, a portable game console, a portable information terminal, and an audio reproducing device.
8. A semiconductor device having a thin film transistor, the thin film transistor comprising:
a gate electrode;
a gate insulating layer over the gate electrode;
a microcrystalline semiconductor region over and in contact with the gate insulating layer;
a pair of amorphous semiconductor regions over and in contact with part of the microcrystalline semiconductor region;
a pair of impurity semiconductor layers over the pair of amorphous semiconductor regions;
a pair of wirings over and in contact with the pair of impurity semiconductor layers;
an insulating layer over the pair of wirings; and
an electrode over the insulating layer, the electrode overlapping with the gate electrode,
wherein the microcrystalline semiconductor region includes a first region which is not covered with the pair of amorphous semiconductor regions and a second region which is in contact with the pair of amorphous semiconductor regions,
wherein an upper surface of the second region has a projection and a depression and flatness of the first region is higher than flatness of the second region, and
wherein a thickness d 1 of the first region is smaller than a thickness d 2 of the second region and the thickness d 1 is greater than or equal to 30 nm, where d 2 is a distance between an upper surface of the gate insulating layer and a tip of the projection.
9. The semiconductor device according to claim 8 ,
wherein the pair of amorphous semiconductor regions contain nitrogen, and
wherein a maximum concentration of nitrogen estimated by a secondary ion mass spectrometry is from 1×10 20 atoms/cm 3 to 1×10 21 atoms/cm 3 inclusive.
10. The semiconductor device according to claim 8 ,
wherein entire region of the microcrystalline semiconductor region overlaps with the gate electrode.
11. The semiconductor device according to claim 8 ,
wherein the projection has a shape whose width is narrowed from the gate insulating layer toward the pair of amorphous semiconductor regions.
12. The semiconductor device according to claim 8 ,
wherein the microcrystalline semiconductor region has a crystal grain whose grains size is from 2 nm to 200 nm.
13. The semiconductor device according to claim 8 ,
wherein the gate electrode is electrically connected with the electrode.
14. An electronic device comprising the semiconductor device according to claim 8 .
15. The electronic device according to claim 14 ,
wherein the electronic device is selected from an electronic book reader, a television, a computer, a camera, a mobile phone, a portable game console, a portable information terminal, and an audio reproducing device.