IP Library Granted Patent US 8,603,880
Granted Patent B2
US 8,603,880 · App. 13/308,686 · Granted Dec 10, 2013

Semiconductor device including gate electrode provided over active region in P-type nitride semiconductor layer and method of manufacturing the same, and power supply apparatus

Inventor: Atsushi Yamada (Kawasaki, JP)
Assignee: Fujitsu Limited
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Quick Facts
Patent No.
US 8,603,880
App. No.
13/308,686
Granted
Dec 10, 2013
Kind
B2
Abstract

A semiconductor device includes a nitride semiconductor stacked structure including a carrier transit layer and a carrier supply layer; a p-type nitride semiconductor layer provided over the nitride semiconductor stacked structure and including an active region and an inactive region; an n-type nitride semiconductor layer provided on the inactive region in the p-type nitride semiconductor layer; and a gate electrode provided over the active region in the p-type nitride semiconductor layer.

Claims (21)

1. A method of manufacturing a semiconductor device, comprising:

forming a nitride semiconductor stacked structure comprising a carrier transit layer and a carrier supply layer;

forming a p-type nitride semiconductor layer over the nitride semiconductor stacked structure;

forming an n-type nitride semiconductor layer on the p-type nitride semiconductor layer;

removing a portion of the n-type nitride semiconductor layer;

forming an active region in a portion of the p-type nitride semiconductor layer by performing a thermal treatment; and

forming a gate electrode over the active region in the p-type nitride semiconductor layer,

wherein the forming the n-type nitride semiconductor layer comprises forming the n-type nitride semiconductor layer using a same nitride semiconductor material which does not contain Al as that of the p-type nitride semiconductor layer.

2. The method of manufacturing a semiconductor device according to claim 1 , wherein the removing a portion of the n-type nitride semiconductor layer comprises removing the portion of the n-type nitride semiconductor layer with photo-electrochemical etching.

3. The method of manufacturing a semiconductor device according to claim 1 , further comprising:

forming a protection film covering surfaces of the p-type nitride semiconductor layer and the n-type nitride semiconductor layer, before forming the active region; and

removing the protection film after forming the active region.

4. The method of manufacturing a semiconductor device according to claim 1 , wherein the nitride semiconductor stacked structure, the p-type nitride semiconductor layer, and the n-type nitride semiconductor layer are formed successively.

5. The method of manufacturing a semiconductor device according to claim 1 , wherein the forming the p-type nitride semiconductor layer comprises forming a p-type nitride semiconductor layer including a GaN, AIN or InN crystal, or a mixed crystal thereof, and the forming the n-type nitride semiconductor layer comprises forming an n-type nitride semiconductor layer including a GaN, AIN or InN crystal, or a mixed crystal thereof.

6. The method of manufacturing a semiconductor device according to claim 1 , wherein the forming the p-type nitride semiconductor layer comprises forming a p-type GaN layer, and the forming the n-type nitride semiconductor layer comprises forming an n-type GaN layer.

7. The method of manufacturing a semiconductor device according to claim 1 , wherein the forming the gate electrode comprises forming a gate electrode that Schottky-contacts to the active region in the p-type nitride semiconductor layer.

8. The method of manufacturing a semiconductor device according to claim 1 , further comprising forming a gate insulation film, after forming the active region and before forming the gate electrode.

9. The method of manufacturing a semiconductor device according to claim 1 , wherein the forming the nitride semiconductor stacked structure comprises forming a nitride semiconductor stacked structure including a GaN, AIN or InN crystal, or a mixed crystal thereof.

10. The method of manufacturing a semiconductor device according to claim 1 , Wherein

the forming the n-type nitride semiconductor layer comprises covering the p-type nitride semiconductor layer in which p-type impurity is inactive with the n-type nitride semiconductor layer such that the p-type nitride semiconductor layer is partially exposed, and

the forming the active region comprises partially forming the active region in the p-type nitride semiconductor layer by hydrogen desorption from the exposed portion of the p-type nitride semiconductor layer by performing the thermal treatment.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2014
From: FUJITSU LIMITED
To: TRANSPHORM JAPAN, INC.
Reel/Frame 032865/0196 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2011
From: YAMADA, ATSUSHI
To: FUJITSU LIMITED
Reel/Frame 027393/0132 →
Priority Claims (1)
JP 2011-032042 · Feb 17, 2011 · national
Continuity (1)
Related Publication 20120211760A1 · Aug 23, 2012