Re-growing source/drain regions from un-relaxed silicon layer

1. A method comprising:

forming a silicon germanium layer;

forming a silicon-containing layer over the silicon germanium layer, wherein an atomic percentage of the silicon-containing layer is lower than an atomic percentage of the silicon germanium layer;

forming a gate stack over the silicon-containing layer and the silicon germanium layer;

recessing the silicon-containing layer to form a recess adjacent the gate stack; and

epitaxially growing a silicon-containing semiconductor region in the recess to form a source/drain stressor, wherein the silicon-containing semiconductor region forms a source/drain region of an n-type metal-oxide-semiconductor (NMOS) field-effect transistor (FET).

2. The method of claim 1 , wherein the silicon germanium layer is relaxed, and the silicon-containing layer is fully un-relaxed, wherein a lattice constant of the silicon-containing layer is greater than 5.43 Å, and is equal to a lattice constant of the silicon germanium layer.

3. The method of claim 1 , wherein the silicon germanium layer is relaxed, and the silicon-containing layer is partially un-relaxed, wherein a lattice constant of the silicon-containing layer is greater than 5.43 Å, and is smaller than a lattice constant of the silicon germanium layer.

4. The method of claim 1 , wherein the silicon germanium layer is fully relaxed.

5. The method of claim 1 , wherein the step of epitaxially growing the silicon-containing semiconductor region comprises epitaxially growing a silicon germanium stressor, and wherein the silicon germanium stressor has a germanium atomic percentage lower than a germanium atomic percentage of the silicon germanium layer.

6. The method of claim 1 , wherein the step of epitaxially growing the silicon-containing semiconductor region comprises epitaxially growing a silicon stressor, and wherein the silicon stressor is free from germanium.

7. The method of claim 1 further comprising in-situ doping an n-type impurity simultaneously with the step of epitaxially growing the silicon-containing semiconductor region.

8. The method of claim 1 , wherein the atomic percentage of the silicon-containing layer is equal to zero.

9. A method comprising:

epitaxially growing a silicon germanium layer over a portion of a silicon substrate;

epitaxially growing a silicon layer over the silicon germanium layer, wherein the silicon germanium layer is relaxed, and the silicon layer is un-relaxed;

forming a gate stack over the silicon layer and the silicon germanium layer, wherein a portion of the silicon layer forms a channel region of an n-type metal-oxide-semiconductor (NMOS) field-effect transistor (FET);

recessing the silicon layer to form recesses on opposite sides of the gate stack; and

epitaxially growing silicon germanium stressors in the recesses, wherein the silicon germanium stressors have a germanium atomic percent lower than a germanium atomic percent of the silicon germanium layer, and wherein the silicon germanium stressors form source and drain regions of the NMOS FET.

10. The method of claim 9 further comprising in-situ doping an n-type impurity in the silicon germanium stressors, wherein the step of in-situ doping is performed simultaneously with the step of epitaxially growing the silicon germanium stressors.

11. The method of claim 9 , wherein during the step of recessing, top portions of the silicon germanium layer is recessed along with portions of the silicon layer.

12. The method of claim 9 , wherein the silicon germanium stressors do not extend into the silicon germanium layer.

13. The method of claim 9 , wherein the silicon germanium stressors extends into the silicon germanium layer.