IP Library › Granted Patent US 8,610,246
Granted Patent B2
US 8,610,246 · App. 13/084,074 · Granted Dec 17, 2013

Semiconductor device capable of restricting coil extension direction and manufacturing method thereof

Inventors: Shinji Yoshihara (Nagoya, JP); Kazushi Asami (Okazaki, JP); Yasuhiro Kitamura (Chiryu, JP); Junji Oohara (Nisshin, JP)
Assignee: DENSO CORPORATION
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Quick Facts
Patent No.
US 8,610,246
App. No.
13/084,074
Granted
Dec 17, 2013
Kind
B2
Abstract

In a manufacturing method for a semiconductor device having a coil layer part on a substrate, two support substrates each having a flat surface are prepared, and a component member is formed on the flat surface of each of the support substrates. The component member includes a wiring portion having a predetermined pattern and an insulation film surrounding the wiring portion. The wiring portion is provided with a connecting portion exposing from the insulation film. A coil layer part is formed by opposing and bonding the component members formed on the support substrates to each other while applying pressure in a condition where the flat surfaces of the support substrates are parallel to each other. A coil is formed in the coil layer part by connecting the wiring portions through the connecting portions.

Claims (15)

1. A semiconductor device, comprising:

a board having a surface; and

a coil layer part disposed on the surface of the board, the coil layer part constructed of a plurality of component members and including a coil defining an axis in a direction of a normal to the surface of the board, wherein

each of the component members includes a wiring portion having a predetermined pattern and an insulation film surrounding the wiring portion,

each wiring portion is provided with a connecting portion exposing from the respective insulation film,

the coil is constructed of the wiring portions connected to each other through the connecting portions,

the coil layer part is formed by bonding the component members disposed on surfaces of support substrates to each other such that the wiring portions are connected to each other through the connecting portions while maintaining the surfaces of the support substrates parallel to each other,

the coil layer part has an accommodation space between adjacent component members, and

the accommodation space is provided by a recess defined in a surface portion of the insulation film of at least one of the adjacent component members.

2. The semiconductor device according to claim 1 , wherein

the recess is located in an area opposing to the wiring portion other than a portion from which the connecting portion exposes.

3. The semiconductor device according to claim 1 , wherein

the recess is located in an area corresponding to an inside of the coil.

4. The semiconductor device according to claim 1 wherein

the recess has a continuous shape having an opening at an outer end of the component member, the opening allowing communication between the accommodation space and an outside of the coil layer part.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 11, 2011
From: YOSHIHARA, SHINJI; ASAMI, KAZUSHI; KITAMURA, YASUHIRO; OOHARA, JUNJI
To: DENSO CORPORATION
Reel/Frame 026105/0918 →
Priority Claims (2)
JP 2010-92304 · Apr 13, 2010 · national
JP 2011-21759 · Feb 3, 2011 · national
Continuity (1)
Related Publication 20110248380A1 · Oct 13, 2011