IP Library Granted Patent US 8,610,506
Granted Patent B2
US 8,610,506 · App. 13/402,564 · Granted Dec 17, 2013

Amplifier circuit

Inventor: Akiko Mineyama (Kawasaki, JP)
Assignee: Fujitsu Limited
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Quick Facts
Patent No.
US 8,610,506
App. No.
13/402,564
Granted
Dec 17, 2013
Kind
B2
Abstract

An amplifier circuit includes: a first transformer in which a first inductor and a second inductor are magnetically coupled; a first field-effect transistor in which a gate is connected to a first input node via the first inductor, a drain is connected to a drain bias potential node via the second inductor, and a source is connected to a reference potential node; and a first output node connected to the drain of the first field-effect transistor.

Claims (20)

1. An amplifier circuit, comprising:

a first transformer in which a first inductor and a second inductor are magnetically coupled;

a first field-effect transistor in which a gate is connected to a first input node via the first inductor, a drain is connected to a drain bias potential node via the second inductor, and a source is connected to a reference potential node;

a first output node connected to the drain of the first field-effect transistor;

a third inductor connected between the first input node and a first gate bias potential node; and

a first capacitor connected between the first input node and an input terminal.

2. The amplifier circuit according to claim 1 , further comprising:

a second transformer in which a fourth inductor and a fifth inductor are magnetically coupled;

a second field-effect transistor in which a gate is connected to a second input node via the fourth inductor, a drain is connected to the drain bias potential node via the fifth inductor, and a source is connected to a reference potential node;

a second output node connected to the drain of the second field-effect transistor;

a sixth inductor connected between the second input node and a second gate bias potential node; and

a second capacitor connected between the first output node and the second input node.

3. The amplifier circuit according to claim 2 , further comprising:

a seventh inductor connected to the second capacitor in series.

4. The amplifier circuit according to claim 1 ,

wherein radiuses of windings of the first inductor and the second inductor are different from one another.

5. The amplifier circuit according to claim 1 ,

wherein center axes of windings of the first inductor and the second inductor are deviated from one another.

6. The amplifier circuit according to claim 1 ,

wherein winding numbers of windings of the first inductor and the second inductor are different from one another.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 2, 2012
From: MINEYAMA, AKIKO
To: FUJITSU LIMITED
Reel/Frame 028140/0599 →
Priority Claims (2)
JP 2011-038502 · Feb 24, 2011 · national
JP 2011-228040 · Oct 17, 2011 · national
Continuity (1)
Related Publication 20120218041A1 · Aug 30, 2012