Display device and driving method of the same
A problem in that a light emitting element slightly emits light is solved by an off current of a thin film transistor connected in series to the light emitting element, thereby a display device which can perform a clear display by increasing contrast, and a driving method thereof are provided. When the thin film transistor connected in series to the light emitting element is turned off, a charge held in the capacitance of the light emitting element itself is discharged. Even when an off current is generated at the thin film transistor connected in series to the light emitting element, this off current charges this capacitance until the capacitance of the light emitting element itself holds a predetermined voltage again. Accordingly, the off current of the thin film transistor does not contribute to light emission. In this manner, a slight light emission of the light emitting element can be reduced.
1. A display device comprising a pixel, the pixel comprising:
a transistor comprising a semiconductor layer including a channel formation region, a gate, and a gate insulating layer interposed between the semiconductor layer and the gate;
a first capacitor;
a second capacitor;
a first insulating layer over the transistor;
a second insulating layer over the first insulating layer, the second insulating layer comprising a first opening and a second opening, each of the first opening and the second opening being formed in the pixel; and
a light emitting element comprising:
a pixel electrode over the first insulating layer and below the second insulating layer, the pixel electrode being electrically connected to the semiconductor layer;
a light emitting layer over the pixel electrode; and
a conductive layer over the second insulating layer and the light emitting layer,
wherein the conductive layer is located over the first opening and the second opening,
wherein the light emitting layer is located over the first opening while the light emitting layer is not located over the second opening,
wherein a first electrode of the first capacitor is electrically connected to the gate and a second electrode of the first capacitor is directly connected to the pixel electrode, and
wherein the second capacitor and the light emitting element are connected in parallel with each other.
2. The display device according to claim 1 ,
wherein the gate is located over the semiconductor layer.
3. The display device according to claim 1 ,
wherein a first electrode of the second capacitor is the pixel electrode, and
wherein a second electrode of the second capacitor is the conductive layer.
4. The display device according to claim 1 ,
wherein the pixel electrode is located below the first opening and the second opening.
5. The display device according to claim 1 , further comprising a means for setting a potential and a third insulating layer,
wherein the means is electrically connected to the conductive layer, and
wherein the third insulating layer is interposed between the first insulating layer and the second insulating layer and is located below the second opening.
6. The display device according to claim 1 , further comprising another transistor, a first power source line, and a second power source line,
wherein one of a source and a drain of the another transistor is electrically connected to the pixel electrode and the other of the source and the drain of the another transistor is directly connected to the first power source line,
wherein the second power source line is electrically connected to the conductive layer, and
wherein a potential of the second power source line is lower than that of the first power source line.
7. A display device comprising a pixel, the pixel comprising:
a transistor comprising a semiconductor layer including a channel formation region, a gate, and a gate insulating layer interposed between the semiconductor layer and the gate;
a first capacitor;
a second capacitor;
a first insulating layer over the transistor;
a first conductive layer over the first insulating layer, the first conductive layer overlapping with the channel formation region of the transistor;
a second insulating layer over the first insulating layer, the second insulating layer comprising a first opening and a second opening, each of the first opening and the second opening being formed in the pixel; and
a light emitting element comprising:
a pixel electrode over the first insulating layer and below the second insulating layer, the pixel electrode being electrically connected to the semiconductor layer;
a light emitting layer over the pixel electrode; and
a second conductive layer over the second insulating layer and the light emitting layer,
wherein the second conductive layer is located over the first opening and the second opening,
wherein the light emitting layer is located over the first opening while the light emitting layer is not located over the second opening,
wherein a first electrode of the first capacitor is electrically connected to the gate and a second electrode of the first capacitor is directly connected to the pixel electrode, and
wherein the second capacitor and the light emitting element are connected in parallel with each other.
8. The display device according to claim 7 ,
wherein the gate is located over the semiconductor layer.
9. The display device according to claim 7 ,
wherein a first electrode of the second capacitor is the pixel electrode, and
wherein a second electrode of the second capacitor is the second conductive layer.
10. The display device according to claim 7 ,
wherein the pixel electrode is located below the first opening and the second opening.
11. The display device according to claim 7 , further comprising a means for setting a potential and a third insulating layer,
wherein the means is electrically connected to the second conductive layer, and
wherein the third insulating layer is interposed between the first insulating layer and the second insulating layer and is located below the second opening.
12. The display device according to claim 7 , further comprising another transistor, a first power source line, and a second power source line,
wherein one of a source and a drain of the another transistor is electrically connected to the pixel electrode and the other of the source and the drain of the another transistor is directly connected to the first power source line,
wherein the second power source line is electrically connected to the second conductive layer, and
wherein a potential of the second power source line is lower than that of the first power source line.
13. The display device according to claim 7 , wherein the pixel electrode is directly connected to the first conductive layer.
14. The display device according to claim 7 , wherein a third capacitor is formed using the first conductive layer, the second insulating layer, and the second conductive layer.
15. A display device comprising a pixel, the pixel comprising:
a first transistor;
a second transistor comprising a semiconductor layer including a channel formation region, a gate, and a gate insulating layer interposed between the semiconductor layer and the gate;
a first capacitor;
a second capacitor;
a first insulating layer over the first transistor and the second transistor;
a second insulating layer over the first insulating layer, the second insulating layer comprising a first opening and a second opening, each of the first opening and the second opening being formed in the pixel; and
a light emitting element comprising:
a pixel electrode over the first insulating layer and below the second insulating layer, the pixel electrode being electrically connected to the semiconductor layer;
a light emitting layer over the pixel electrode; and
a conductive layer over the second insulating layer and the light emitting layer,
wherein the conductive layer is located over the first opening and the second opening,
wherein the light emitting layer is located over the first opening while the light emitting layer is not located over the second opening,
wherein a first electrode of the first capacitor is electrically connected to the gate and a second electrode of the first capacitor is directly connected to the pixel electrode,
wherein the second capacitor and the light emitting element are connected in parallel with each other, and
wherein one of a source and a drain of the second transistor is electrically connected to the gate.
16. The display device according to claim 15 ,
wherein the gate is located over the semiconductor layer.
17. The display device according to claim 15 ,
wherein a first electrode of the second capacitor is the pixel electrode, and
wherein a second electrode of the second capacitor is the conductive layer.
18. The display device according to claim 15 ,
wherein the pixel electrode is located below the first opening and the second opening.
19. The display device according to claim 15 , further comprising a means for setting a potential and a third insulating layer,
wherein the means is electrically connected to the conductive layer, and
wherein the third insulating layer is interposed between the first insulating layer and the second insulating layer and is located below the second opening.
20. The display device according to claim 15 , further comprising a third transistor, a first power source line, and a second power source line,
wherein one of a source and a drain of the third transistor is electrically connected to the pixel electrode and the other of the source and the drain of the third transistor is directly connected to the first power source line,
wherein the second power source line is electrically connected to the conductive layer, and
wherein a potential of the second power source line is lower than that of the first power source line.
21. A display device comprising a pixel, the pixel comprising:
a first transistor:
a second transistor comprising a semiconductor layer including a channel formation region, a gate, and a gate insulating layer interposed between the semiconductor layer and the gate;
a first capacitor;
a second capacitor;
a first insulating layer over the first transistor and the second transistor;
a first conductive layer over the first insulating layer, the first conductive layer overlapping with the channel formation region of the second transistor;
a second insulating layer over the first insulating layer, the second insulating layer comprising a first opening and a second opening, each of the first opening and the second opening being formed in the pixel; and
a light emitting element comprising:
a pixel electrode over the first insulating layer and below the second insulating layer, the pixel electrode being electrically connected to the semiconductor layer;
a light emitting layer over the pixel electrode; and
a second conductive layer over the second insulating layer and the light emitting layer,
wherein the second conductive layer is located over the first opening and the second opening,
wherein the light emitting layer is located over the first opening while the light emitting layer is not located over the second opening,
wherein a first electrode of the first capacitor is electrically connected to the gate and a second electrode of the first capacitor is directly connected to the pixel electrode,
wherein the second capacitor and the light emitting element are connected in parallel with each other, and
wherein one of a source and a drain of the second transistor is electrically connected to the gate.
22. The display device according to claim 21 ,
wherein the gate is located over the semiconductor layer.
23. The display device according to claim 21 ,
wherein a first electrode of the second capacitor is the pixel electrode, and
wherein a second electrode of the second capacitor is the second conductive layer.
24. The display device according to claim 21 ,
wherein the pixel electrode is located below the first opening and the second opening.
25. The display device according to claim 21 , further comprising a means for setting a potential and a third insulating layer,
wherein the means is electrically connected to the second conductive layer, and
wherein the third insulating layer is interposed between the first insulating layer and the second insulating layer and is located below the second opening.
26. The display device according to claim 21 , further comprising a third transistor, a first power source line, and a second power source line,
wherein one of a source and a drain of the third transistor is electrically connected to the pixel electrode and the other of the source and the drain of the third transistor is directly connected to the first power source line,
wherein the second power source line is electrically connected to the second conductive layer, and
wherein a potential of the second power source line is lower than that of the first power source line.
27. The display device according to claim 21 , wherein the pixel electrode is electrically connected to the semiconductor layer through the first conductive layer.
28. The display device according to claim 21 , wherein a third capacitor is formed using the first conductive layer, the second insulating layer, and the second conductive layer.