ARC fault circuit interrupter tester with current responsive pulse timing

1. An arc fault circuit interrupter test circuit comprising:

i. a full-wave bridge rectifier accepting a hot line of an electrical system and a neutral line of an electrical system and generating a positive line and a negative line;

ii. at least one power transistor coupled to the positive line of said full-wave bridge rectifier and to the negative line of said full-wave bridge rectifier, and adapted to electrically couple said positive line and said negative line when operated;

iii. a voltage sense circuit coupled to the hot line of the electrical system and the neutral line of the electrical system for sensing an AC voltage waveform;

iv. a current sense circuit for sensing current flow through said power transistor;

v. a controller coupled to the voltage sense circuit, the current sense circuit, and to said power transistor, said controller adapted to generate a sequence of control pulses for operating said power transistor and coupling said positive line to said negative line, thereby generating a fault, wherein the controller is adapted to generate each control pulse at a specific voltage of the AC voltage waveform, and further adapted to measure a current generated by each control pulse and compare the current to a predetermined level, and when the current is less than the predetermined level, the controller is adapted to generate a next control pulse at a higher voltage level of the AC voltage waveform.

2. The test circuit of claim 1 wherein the controller is adapted to determine that current measured during a control pulse is greater than or equal to the predetermined level and wherein the controller is adapted to generate a total of twelve control pulses on consecutive half cycles at a voltage corresponding to the measured current.

3. The test circuit of claim 1 wherein the voltage sense circuit comprises:

i. a voltage divider that is electrically coupled to one of said hot line of the electrical system and said neutral line of the electrical system; and

ii. an analog to digital converter coupled to said voltage divider and to said controller, wherein said controller is adapted to periodically sample said analog to digital converter and based at least partially on said sampling determine a cycle time to operate said power transistor.

4. The test circuit of claim 1 wherein the current sense circuit comprises:

i. a sense resistor that is electrically coupled to the hot line of the electrical system and the neutral line of the electrical system when said power transistor is operated; and

ii. an analog to digital converter coupled to said sense resistor and to said controller, wherein said controller is adapted to periodically sample said analog to digital converter and based at least partially on said sampling determine a cycle time to operate said power transistor.

5. The test circuit of claim 4 wherein the sense resistor is a single resistor.

6. The test circuit of claim 5 wherein the single resistor has a power rating of between 1 W and 5 W.

7. The test circuit of claim 4 wherein the sense resistor is a plurality of resistors connected in parallel to one another.

8. The test circuit of claim 7 wherein each of said, plurality of resistors has a power rating of between 0.5 W and 5 W.

9. The test circuit of claim 1 wherein said at least one power transistor comprises two power transistors connected in parallel.

10. The test circuit of claim 1 further comprising an indicator and wherein said controller is adapted to monitor said current sense circuit and based on said monitored current sense circuit, operate said indicator.

11. The test circuit of claim 10 where said indicator includes at least one LED.

12. The test circuit of claim 11 wherein said indicator consists of a green LED.

13. The test circuit of claim of 12 wherein said controller is adapted to monitor said current sense circuit to determine if an arc fault circuit breaker electrically coupled to said test circuit has operated and wherein said controller is adapted to operated said indicator based on whether said arc fault circuit breaker has operated.

14. The test circuit of claim 1 further comprising a control pulse timing circuit for ensuring that a control pulse operating said power transistor is finite in duration.

15. A method operating on a microcontroller for testing the functionality of an arc fault circuit interrupter, the method comprising the steps of:

i. generating a plurality of control pulses of finite duration, each control pulse generated at a selected voltage of an AC power system;

ii. electrically coupling a hot line of the AC power system to a neutral line of the AC power system at a voltage level as indicated by a particular one of the plurality of control pulses;

iii. measuring the current generated while the hot line of the AC power system was coupled to the neutral line of the AC power system; and

iv. when the current is below a threshold current level, changing the voltage level at which a next pulse is fired to a higher voltage level of an AC power waveform.

16. The method of claim 15 wherein 8 to 12 control pulses each producing a current above the threshold level are generated.