Thin film transistor
A highly reliable transistor in which change in electrical characteristics is suppressed is provided. A highly reliable transistor in which change in electrical characteristics is suppressed is manufactured with high productivity. A display device with less image deterioration over time is provided. An inverted staggered thin film transistor which includes, between a gate insulating film and impurity semiconductor films functioning as source and drain regions, a semiconductor stacked body including a microcrystalline semiconductor region and a pair of amorphous semiconductor regions. In the microcrystalline semiconductor region, the nitrogen concentration on the gate insulating film side is low and the nitrogen concentration in a region in contact with the amorphous semiconductor is high. Further, an interface with the amorphous semiconductor has unevenness.
1. A thin film transistor comprising:
a gate electrode;
a gate insulating film in contact with the gate electrode;
a semiconductor film over the gate insulating film;
a pair of impurity semiconductor films over the semiconductor film;
a wiring over the pair of impurity semiconductor films; and
an insulating film over the gate insulating film, the semiconductor film, the pair of impurity semiconductor films, and the wiring,
wherein the semiconductor film comprises a microcrystalline semiconductor region positioned on a gate insulating film side and a pair of amorphous semiconductor regions in contact with part of the microcrystalline semiconductor region, and
wherein, in the microcrystalline semiconductor region, a nitrogen concentration in an interface with the gate insulating film and a nitrogen concentration in an interface with the insulating film are lower than a nitrogen concentration in an interface with the pair of amorphous semiconductor regions.
2. The thin film transistor according to claim 1 , wherein a nitrogen concentration on the gate insulating film side in the microcrystalline semiconductor region is higher than or equal to a minimum limit of detection and lower than or equal to 1×10 19 atoms/cm 3 .
3. The thin film transistor according to claim 1 , wherein a nitrogen concentration on a pair of amorphous semiconductor regions side in the microcrystalline semiconductor region is higher than or equal to 1×10 20 atoms/cm 3 and lower than or equal to 1×10 21 atoms/cm 3 .
4. The thin film transistor according to claim 1 , further comprising a back gate electrode overlapping with a region of the microcrystalline semiconductor region, which is over the insulating film and does not overlap with the wiring.
5. The thin film transistor according to claim 1 , wherein the microcrystalline semiconductor region has a sharp projection at an interface between the pair of amorphous semiconductor regions.
6. The thin film transistor according to claim 1 , wherein an interface between the insulating film and the microcrystalline semiconductor region is flat.
7. The thin film transistor according to claim 1 ,
wherein the gate insulating film has a stacked-layer structure of a nitride insulating film and an oxide insulating film, and
wherein the oxide insulating film is positioned on a microcrystalline semiconductor region side.
8. The thin film transistor according to claim 1 ,
wherein the insulating film has a stacked-layer structure of a nitride insulating film and an oxide insulating film, and
wherein the oxide insulating film is positioned on a microcrystalline semiconductor region side.
9. A thin film transistor comprising:
a gate electrode;
a gate insulating film in contact with the gate electrode;
a semiconductor film over the gate insulating film;
a pair of impurity semiconductor films over the semiconductor film;
a wiring over the pair of impurity semiconductor films; and
an insulating film over the gate insulating film, the semiconductor film, the pair of impurity semiconductor films, and the wiring,
wherein the semiconductor film comprises a microcrystalline semiconductor region positioned on a gate insulating film side and a pair of amorphous semiconductor regions in contact with part of the microcrystalline semiconductor region,
wherein a nitrogen concentration profile by secondary ion mass spectrometry in the microcrystalline semiconductor region in contact with the pair of amorphous semiconductor regions marks a peak concentration on an amorphous semiconductor region side, and
wherein a nitrogen concentration profile by secondary ion mass spectrometry in the microcrystalline semiconductor region in contact with the insulating film marks no peak concentration.
10. The thin film transistor according to claim 9 , wherein a nitrogen concentration on the gate insulating film side in the microcrystalline semiconductor region is higher than or equal to a minimum limit of detection and lower than or equal to 1×10 19 atoms/cm 3 .
11. The thin film transistor according to claim 9 , wherein a nitrogen concentration on a pair of amorphous semiconductor regions side in the microcrystalline semiconductor region is higher than or equal to 1×10 20 atoms/cm 3 and lower than or equal to 1×10 21 atoms/cm 3 .
12. The thin film transistor according to claim 9 , further comprising a back gate electrode overlapping with a region of the microcrystalline semiconductor region, which is over the insulating film and does not overlap with the wiring.
13. The thin film transistor according to claim 9 , wherein the microcrystalline semiconductor region has a sharp projection at an interface between the pair of amorphous semiconductor regions.
14. The thin film transistor according to claim 9 , wherein an interface between the insulating film and the microcrystalline semiconductor region is flat.
15. The thin film transistor according to claim 9 ,
wherein the gate insulating film has a stacked-layer structure of a nitride insulating film and an oxide insulating film, and
wherein the oxide insulating film is positioned on a microcrystalline semiconductor region side.
16. The thin film transistor according to claim 9 ,
wherein the insulating film has a stacked-layer structure of a nitride insulating film and an oxide insulating film, and
wherein the oxide insulating film is positioned on a microcrystalline semiconductor region side.
17. A thin film transistor comprising:
a gate electrode;
a gate insulating film in contact with the gate electrode;
a semiconductor film over the gate insulating film;
a pair of impurity semiconductor films over the semiconductor film;
a wiring over the pair of impurity semiconductor films; and
an insulating film over the gate insulating film, the semiconductor film, the pair of impurity semiconductor films, and the wiring,
wherein the semiconductor film comprises a microcrystalline semiconductor region positioned on a gate insulating film side and a pair of amorphous semiconductor regions in contact with part of the microcrystalline semiconductor region,
wherein a nitrogen concentration profile by secondary ion mass spectrometry in the microcrystalline semiconductor region in contact with the pair of amorphous semiconductor regions increases from the gate insulating film side toward an amorphous semiconductor region side, and has a maximum value in the part of the microcrystalline semiconductor region and the pair of amorphous semiconductor regions, and
wherein a nitrogen concentration profile by secondary ion mass spectrometry in the microcrystalline semiconductor region in contact with the insulating film marks no peak concentration.
18. The thin film transistor according to claim 17 , wherein a nitrogen concentration on the gate insulating film side in the microcrystalline semiconductor region is higher than or equal to a minimum limit of detection and lower than or equal to 1×10 19 atoms/cm 3 .
19. The thin film transistor according to claim 17 , wherein a nitrogen concentration on a pair of amorphous semiconductor regions side in the microcrystalline semiconductor region is higher than or equal to 1×10 20 atoms/cm 3 and lower than or equal to 1×10 21 atoms/cm 3 .
20. The thin film transistor according to claim 17 , further comprising a back gate electrode overlapping with a region of the microcrystalline semiconductor region, which is over the insulating film and does not overlap with the wiring.
21. The thin film transistor according to claim 17 , wherein the microcrystalline semiconductor region has a sharp projection at an interface between the pair of amorphous semiconductor regions.
22. The thin film transistor according to claim 17 , wherein an interface between the insulating film and the microcrystalline semiconductor region is flat.
23. The thin film transistor according to claim 17 ,
wherein the gate insulating film has a stacked-layer structure of a nitride insulating film and an oxide insulating film, and
wherein the oxide insulating film is positioned on a microcrystalline semiconductor region side.
24. The thin film transistor according to claim 17 ,
wherein the insulating film has a stacked-layer structure of a nitride insulating film and an oxide insulating film, and
wherein the oxide insulating film is positioned on a microcrystalline semiconductor region side.