Memory protection unit with support for distributed permission checks
A memory management and protection system that manages memory access requests from a number of requestors. Memory accesses are allowed or disallowed based on the permissions assigned to the request based on the memory segment being accessed. The decision to allow or disallow access is made by the extended memory controller by merging the permissions assigned to the memory segment being accessed, and the permissions assigned to the access request by the originating memory controller or other endpoint.
1. A memory management system comprising:
a memory organized as a plurality of programmable memory segments,
a plurality of requestors operable to originate memory access requests wherein the memory access request includes a memory address to be accessed, a descriptor of the requested access and a permission field containing a plurality of bits indicating the access permissions associated with the request,
an extended memory controller operable to control access to said memory, said extended memory controller including
a port operable to communicate with the plurality of requestors,
a segment register associated with each memory segment operable to store parameter fields defining the memory segment including a memory starting address, memory size and a plurality of permission bits,
a comparison circuit operable to compare the memory address range in the segment registers as defined by the starting address and memory size of each segment register, and the memory address provided as part of the memory access request provided by the requestor on said port, and further operable to select a segment register based on said comparison showing that the requested address is within said memory address range of the selected segment register, and
a logic circuit operable to perform a logical AND operation between corresponding bits in the permissions field in the selected segment register and the permissions field provided as part of the memory access request provided on said port, resulting in merged permissions applicable to said memory access request.
2. The memory management system of claim 1 , wherein:
at least one of the requestors is a memory controller.
3. The memory management system of claim 1 , wherein:
at least one of the requestors is a processing unit.
4. The extended memory controller of claim 1 , wherein:
at least one of the requestors provides a permission field containing all 1's indicating that it does not require any modification of the permission field within the selected segment register.
5. The extended memory controller of claim 1 , wherein:
memory access is granted or denied by the extended memory controller based upon the merged permissions.