IP Library Granted Patent US 8,629,000
Granted Patent B2
US 8,629,000 · App. 13/736,344 · Granted Jan 14, 2014

Thin film transistor, method for manufacturing the same, and semiconductor device

Inventors: Toshikazu Kondo (Atsugi, JP); Hideyuki Kishida (Atsugi, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 8,629,000
App. No.
13/736,344
Granted
Jan 14, 2014
Kind
B2
Abstract

In a thin film transistor, an increase in off current or negative shift of the threshold voltage is prevented. In the thin film transistor, a buffer layer is provided between an oxide semiconductor layer and each of a source electrode layer and a drain electrode layer. The buffer layer includes a metal oxide layer which is an insulator or a semiconductor over a middle portion of the oxide semiconductor layer. The metal oxide layer functions as a protective layer for suppressing incorporation of impurities into the oxide semiconductor layer. Therefore, in the thin film transistor, an increase in off current or negative shift of the threshold voltage can be prevented.

Claims (30)

1. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode including copper over a substrate;

forming a gate insulating layer over the gate electrode;

forming an oxide semiconductor layer over the gate insulating layer;

forming a conductive layer including titanium over the oxide semiconductor layer; and

performing a thermal treatment, whereby oxygen in the oxide semiconductor layer is diffused into the conductive layer.

2. The method for manufacturing a semiconductor device according to claim 1 , further comprising a step of forming a source electrode and a drain electrode over the conductive layer before performing the thermal treatment.

3. The method for manufacturing a semiconductor device according to claim 2 , further comprising a step of oxidizing the conductive layer after forming the source electrode and the drain electrode.

4. The method for manufacturing a semiconductor device according to claim 1 , wherein the oxide semiconductor layer includes indium, gallium, and zinc.

5. The method for manufacturing a semiconductor device according to claim 1 , wherein the conductive layer is formed so as to cover a top surface of the oxide semiconductor layer.

6. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode including copper over a substrate;

forming a gate insulating layer over the gate electrode;

forming an oxide semiconductor layer over the gate insulating layer;

forming a conductive layer including titanium and copper over the oxide semiconductor layer; and

performing a thermal treatment, whereby oxygen in the oxide semiconductor layer is diffused into the conductive layer.

7. The method for manufacturing a semiconductor device according to claim 6 , further comprising a step of forming a source electrode and a drain electrode over the conductive layer before performing the thermal treatment.

8. The method for manufacturing a semiconductor device according to claim 7 , further comprising a step of oxidizing the conductive layer after forming the source electrode and the drain electrode.

9. The method for manufacturing a semiconductor device according to claim 6 , wherein the oxide semiconductor layer includes indium, gallium, and zinc.

10. The method for manufacturing a semiconductor device according to claim 6 , wherein the conductive layer is formed so as to cover a top surface of the oxide semiconductor layer.

11. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode including titanium and copper over a substrate;

forming a gate insulating layer over the gate electrode;

forming an oxide semiconductor layer over the gate insulating layer;

forming a conductive layer including titanium and copper over the oxide semiconductor layer; and

performing a thermal treatment, whereby oxygen in the oxide semiconductor layer is diffused into the conductive layer.

12. The method for manufacturing a semiconductor device according to claim 11 , further comprising a step of forming a source electrode and a drain electrode over the conductive layer before performing the thermal treatment.

13. The method for manufacturing a semiconductor device according to claim 12 , further comprising a step of oxidizing the conductive layer after forming the source electrode and the drain electrode.

14. The method for manufacturing a semiconductor device according to claim 11 , wherein the oxide semiconductor layer includes indium, gallium, and zinc.

15. The method for manufacturing a semiconductor device according to claim 11 , wherein the conductive layer is formed so as to cover a top surface of the oxide semiconductor layer.

Priority Claims (1)
JP 2009-037912 · Feb 20, 2009 · national
Continuity (3)
Continuation 13558638 · Jul 26, 2012
Division 12699080 · Feb 3, 2010
Related Publication 20130122667A1 · May 16, 2013