IP Library Granted Patent US 8,637,861
Granted Patent B2
US 8,637,861 · App. 12/948,969 · Granted Jan 28, 2014

Transistor having oxide semiconductor with electrode facing its side surface

Inventors: Shunpei Yamazaki (Tokyo, JP); Daisuke Kawae (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 8,637,861
App. No.
12/948,969
Granted
Jan 28, 2014
Kind
B2
Abstract

Provided is a semiconductor device for high power application including a novel semiconductor material with high productivity. Alternatively, provided is a semiconductor device having a novel structure in which the novel semiconductor material is used. Provided is a vertical transistor including a channel formation region formed using an oxide semiconductor which has a wider band gap than a silicon semiconductor and is an intrinsic semiconductor or a substantially intrinsic semiconductor with impurities that serve as electron donors (donors) in the oxide semiconductor removed. The thickness of the oxide semiconductor is greater than or equal to 1 micrometer, preferably greater than 3 micrometer, more preferably greater than or equal to 10 micrometer.

Claims (47)

1. A transistor comprising:

a first electrode;

an oxide semiconductor which is formed over and in contact with the first electrode and which has a thickness of greater than 3 μm, the oxide semiconductor having a top surface, a bottom surface which is parallel to the top surface, and one or more side surfaces which are not parallel to the top surface;

a second electrode over and in contact with the oxide semiconductor;

a gate insulating film covering the first electrode, the oxide semiconductor and the second electrode; and

a third electrode facing each of the one or more side surfaces of the oxide semiconductor with the gate insulating film provided between the third electrode and each of the one or more side surfaces of the oxide semiconductor,

wherein a length of a side of the bottom surface of the oxide semiconductor is less than one third of the thickness of the oxide semiconductor.

2. The transistor according to claim 1 , wherein the second electrode is in contact with an entirety of the top surface of the oxide semiconductor.

3. The transistor according to claim 1 , wherein the oxide semiconductor has a carrier density of lower than 1×10 14 cm −3 .

4. The transistor according to claim 1 , wherein the third electrode surrounds the oxide semiconductor.

5. The transistor according to claim 1 , wherein the third electrode has a ring shape.

6. A transistor comprising:

a first electrode;

an oxide semiconductor which is over and in contact with the first electrode and which has a thickness of greater than 3 μm, the oxide semiconductor having a top surface, a bottom surface which is parallel to the top surface, and one or more side surfaces which are not parallel to the top surface;

a second electrode over and in contact with the oxide semiconductor;

a gate insulating film covering the first electrode, the oxide semiconductor,

and the second electrode; and

a third electrode facing each of the one or more side surfaces of the oxide semiconductor with the gate insulating film provided between the third electrode and each of the one or more side surfaces of the oxide semiconductor,

wherein the oxide semiconductor includes a crystal region in a region that is in contact with the gate insulating film, and

wherein a length of a side of the bottom surface of the oxide semiconductor is less than one third of the thickness of the oxide semiconductor.

7. The transistor according to claim 6 , wherein the second electrode is in contact with an entirety of the top surface of the oxide semiconductor.

8. The transistor according to claim 6 , wherein the oxide semiconductor has a carrier density of lower than 1×10 14 cm −3 .

9. The transistor according to claim 6 , wherein the third electrode surrounds the oxide semiconductor.

10. The transistor according to claim 6 , wherein the third electrode has a ring shape.

11. A transistor comprising:

a first electrode;

an oxide semiconductor which is over and in contact with the first electrode and which has a thickness of greater than 3 μm, the oxide semiconductor having a top surface, a bottom surface which is parallel to the top surface, and one or more side surfaces which are not parallel to the top surface;

a second electrode over and in contact with the oxide semiconductor;

a gate insulating film covering the first electrode, the oxide semiconductor, and the second electrode; and

a third electrode facing each of the one or more side surfaces of the oxide semiconductor with the gate insulating film provided between the third electrode and each of the one or more side surfaces of the oxide semiconductor,

wherein the second electrode overlaps with the first electrode, and

wherein a length of a side of the bottom surface of the oxide semiconductor is less than one third of the thickness of the oxide semiconductor.

12. The transistor according to claim 11 , wherein the second electrode is in contact with an entirety of the top surface of the oxide semiconductor.

13. The transistor according to claim 11 , wherein the oxide semiconductor has a carrier density of lower than 1×10 14 cm −3 .

14. The transistor according to claim 11 , wherein the third electrode surrounds the oxide semiconductor.

15. The transistor according to claim 11 , wherein the third electrode has a ring shape.

16. A transistor comprising:

a first electrode;

an oxide semiconductor which is over and in contact with the first electrode and which has a thickness of greater than 3 μm, the oxide semiconductor having a top surface, a bottom surface which is parallel to the top surface, and one or more side surfaces which are not parallel to the top surface;

a second electrode over and in direct contact with the oxide semiconductor;

an insulating film covering the first electrode, the oxide semiconductor, and the second electrode; and

a third electrode facing each of the one or more side surfaces of the oxide semiconductor with the insulating film provided between the third electrode and each of the one or more side surfaces of the oxide semiconductor,

wherein a length of a side of the bottom surface of the oxide semiconductor is less than one third of the thickness of the oxide semiconductor.

17. The transistor according to claim 16 , wherein the second electrode is in contact with an entirety of the top surface of the oxide semiconductor.

18. The transistor according to claim 16 , wherein the oxide semiconductor has a carrier density of lower than 1×10 14 cm −3 .

19. The transistor according to claim 16 , wherein the third electrode surrounds the oxide semiconductor.

20. The transistor according to claim 16 , wherein the third electrode has a ring shape.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 4, 2013
From: YAMAZAKI, SHUNPEI; KAWAE, DAISUKE
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 030150/0827 →
Priority Claims (1)
JP 2009-264991 · Nov 20, 2009 · national
Continuity (1)
Related Publication 20110121284A1 · May 26, 2011