Metal gate transistor with resistor
A resistor is disclosed. The resistor is disposed on a substrate, in which the resistor includes: a dielectric layer disposed on the substrate; a polysilicon structure disposed on the dielectric layer; two primary resistance structures disposed on the dielectric layer and at two ends of the polysilicon structure; and a plurality of secondary resistance structures disposed on the dielectric layer and interlaced with the polysilicon structures.
1. A resistor, disposed on a substrate, the resistor comprising:
a dielectric layer disposed on the substrate;
a polysilicon structure disposed on the dielectric layer;
two primary resistance structures disposed on the dielectric layer and at two ends of the polysilicon structure; and
a plurality of secondary resistance structures disposed on the dielectric layer and interlaced and embedded in the polysilicon structure, wherein each bottom surface of the secondary resistances is on the same level as the bottom surface of the polysilicon structure.
2. The resistor of claim 1 , wherein each of the primary resistance structures and the secondary resistance structures comprises a conductive structure.
3. The resistor of claim 1 , further comprising a work function metal layer disposed between the dielectric layer and the primary resistance structures, the polysilicon structure, and the secondary resistance structures.
4. The resistor of claim 3 , further comprising a cap layer disposed between the dielectric layer and the work function metal layer.
5. The resistor of claim 4 , further comprising a spacer disposed on the sidewall of the primary resistance structures, the dielectric layer, the cap layer, and the work function metal layer.
6. The resistor of claim 1 , further comprising a shallow trench isolation in the substrate.
7. The resistor of claim 1 , further comprising a hard mask disposed on the polysilicon structure and between the primary resistance structures and the secondary resistance structures, wherein each top surface of the hard masks is on the same level as each top surface of the primary resistance structures and each top surface of the secondary resistance structures.
8. The resistor of claim 1 , further comprising a metal pattern connected to at least one of the primary resistance structures.
9. The resistor of claim 8 , wherein the metal pattern is on the same level as the primary resistance structures and the secondary resistance structures.
10. The resistor of claim 8 , further comprising a diffusion region formed in the substrate adjacent to or directly under the metal pattern.
11. The resistor of claim 8 , further comprising a plurality of contact plugs disposed on the metal pattern.
12. A metal gate transistor with resistor, comprising:
a substrate having a transistor region and a resistor region;
a transistor disposed on the transistor region of the substrate, wherein the transistor comprises:
a first dielectric layer disposed on the transistor region of the substrate;
a metal gate disposed on the first dielectric layer; and
a source/drain region formed adjacent to two sides of the metal gate;
a resistor disposed on the resistor region of the substrate, wherein the resistor comprises:
a second dielectric layer disposed on the resistor region of the substrate;
a polysilicon structure disposed on the second dielectric layer;
two primary resistance structures disposed on the second dielectric layer and at two ends of the polysilicon structure; and
a plurality of secondary resistance structures disposed on the second dielectric layer and interlaced and embedded in the polysilicon structure, wherein each bottom surface of the secondary resistances is on the same level as the bottom surface of the polysilicon structures.
13. The metal gate transistor with resistor of claim 12 , wherein each of the primary resistance structures and the secondary resistance structures comprises a metal structure.
14. The metal gate transistor with resistor of claim 12 , further comprising a work function metal layer disposed between the first dielectric layer and the metal gate and between the second dielectric layer and the primary resistance structures, the polysilicon structure, and the secondary resistance structures.
15. The metal gate transistor with resistor of claim 12 , further comprising a spacer disposed on the sidewall of the primary resistance structures and the metal gate.
16. The metal gate transistor with resistor of claim 12 , further comprising a shallow trench isolation disposed in the resistor region of the substrate and under the resistor.
17. The metal gate transistor with resistor of claim 12 , further comprising a hard mask disposed on the polysilicon structure and between the primary resistance structures and the secondary resistance structures, wherein each top surface of the hard masks is on the same level as each top surface of the primary resistance structures and each top surface of the secondary resistance structures.
18. The metal gate transistor with resistor of claim 12 , further comprising a metal pattern connected to at least one of the primary resistance structures.
19. The metal gate transistor with resistor of claim 18 , further comprising a diffusion region formed in the substrate adjacent to or directly under the metal pattern.
20. The metal gate transistor with resistor of claim 18 , further comprising a plurality of contact plugs disposed on the metal pattern.